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AliEmcalTriggerMakerKernel.cxx
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3  * *
4  * Author: The ALICE Off-line Project. *
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14  **************************************************************************/
15 #include <iostream>
16 #include <vector>
17 #include <cstring>
18 #include <fstream>
19 
20 #include <TArrayI.h>
21 #include <TF1.h>
22 #include <TObjArray.h>
23 #include <TRandom.h>
24 
25 #include "AliAODCaloTrigger.h"
26 #include "AliEMCALGeometry.h"
27 #include "AliEMCALTriggerConstants.h"
28 #include "AliEMCALTriggerDataGrid.h"
29 #include "AliEMCALTriggerPatchInfo.h"
30 #include "AliEMCALTriggerPatchFinder.h"
31 #include "AliEMCALTriggerAlgorithm.h"
32 #include "AliEMCALTriggerRawPatch.h"
35 #include "AliLog.h"
36 #include "AliVCaloCells.h"
37 #include "AliVCaloTrigger.h"
38 #include "AliVEvent.h"
39 #include "AliVVZERO.h"
40 
44 
46  TObject(),
47  fBadChannels(),
48  fOfflineBadChannels(),
49  fFastORPedestal(5000),
50  fTriggerBitConfig(nullptr),
51  fPatchFinder(nullptr),
52  fLevel0PatchFinder(nullptr),
53  fL0MinTime(7),
54  fL0MaxTime(10),
55  fMinCellAmp(0),
56  fMinL0FastORAmp(0),
57  fMinL1FastORAmp(0),
58  fBkgThreshold(-1),
59  fL0Threshold(0),
60  fIsMC(kFALSE),
61  fDebugLevel(0),
62  fMinCellAmplitude(0.),
63  fApplyOnlineBadChannelsToOffline(kFALSE),
64  fConfigured(kFALSE),
65  fSmearModelMean(nullptr),
66  fSmearModelSigma(nullptr),
67  fSmearThreshold(0.1),
68  fGeometry(nullptr),
69  fPatchAmplitudes(nullptr),
70  fPatchADCSimple(nullptr),
71  fPatchADC(nullptr),
72  fPatchEnergySimpleSmeared(nullptr),
73  fLevel0TimeMap(nullptr),
74  fTriggerBitMap(nullptr),
75  fADCtoGeV(1.)
76 {
77  memset(fThresholdConstants, 0, sizeof(Int_t) * 12);
78  memset(fL1ThresholdsOffline, 0, sizeof(ULong64_t) * 4);
79  fCellTimeLimits[0] = -10000.;
80  fCellTimeLimits[1] = 10000.;
81 }
82 
84  delete fPatchAmplitudes;
85  delete fPatchADCSimple;
86  delete fPatchADC;
88  delete fLevel0TimeMap;
89  delete fTriggerBitMap;
90  delete fPatchFinder;
91  delete fLevel0PatchFinder;
93 }
94 
96  if (!fTriggerBitConfig) {
97  AliWarning("Trigger bit configuration was not provided! Assuming new bit configuration (>= 2013).");
98  AliEMCALTriggerBitConfig* triggerBitConfig = new AliEMCALTriggerBitConfigNew();
99  SetTriggerBitConfig(triggerBitConfig);
100  }
101 
107 
108  // Allocate containers for the ADC values
109  int nrows = fGeometry->GetNTotalTRU() * 2;
110  std::cout << "Allocating channel grid with 48 columns in eta and " << nrows << " rows in phi" << std::endl;
111  fPatchAmplitudes->Allocate(48, nrows);
112  fPatchADC->Allocate(48, nrows);
113  fPatchADCSimple->Allocate(48, nrows);
114  fLevel0TimeMap->Allocate(48, nrows);
115  fTriggerBitMap->Allocate(48, nrows);
116 
118  // Allocate container for energy smearing (if enabled)
120  fPatchEnergySimpleSmeared->Allocate(48, nrows);
121  }
122 }
123 
124 void AliEmcalTriggerMakerKernel::AddL1TriggerAlgorithm(Int_t rowmin, Int_t rowmax, UInt_t bitmask, Int_t patchSize, Int_t subregionSize)
125 {
127  AliEMCALTriggerAlgorithm<double> *trigger = new AliEMCALTriggerAlgorithm<double>(rowmin, rowmax, bitmask);
128  trigger->SetPatchSize(patchSize);
129  trigger->SetSubregionSize(subregionSize);
130  fPatchFinder->AddTriggerAlgorithm(trigger);
131 }
132 
133 void AliEmcalTriggerMakerKernel::SetL0TriggerAlgorithm(Int_t rowmin, Int_t rowmax, UInt_t bitmask, Int_t patchSize, Int_t subregionSize)
134 {
136  fLevel0PatchFinder = new AliEMCALTriggerAlgorithm<double>(rowmin, rowmax, bitmask);
137  fLevel0PatchFinder->SetPatchSize(patchSize);
138  fLevel0PatchFinder->SetSubregionSize(subregionSize);
139 }
140 
142 {
143  AliEMCALTriggerBitConfig* triggerBitConfig = new AliEMCALTriggerBitConfigNew();
144  SetTriggerBitConfig(triggerBitConfig);
145 
146  // Initialize patch finder
147  if (fPatchFinder) delete fPatchFinder;
149 
150  SetL0TriggerAlgorithm(0, 103, 1<<fTriggerBitConfig->GetLevel0Bit(), 2, 1);
151  AddL1TriggerAlgorithm(0, 63, 1<<fTriggerBitConfig->GetGammaHighBit() | 1<<fTriggerBitConfig->GetGammaLowBit(), 2, 1);
152  AddL1TriggerAlgorithm(64, 103, 1<<fTriggerBitConfig->GetGammaHighBit() | 1<<fTriggerBitConfig->GetGammaLowBit(), 2, 1);
153  AddL1TriggerAlgorithm(0, 63, 1<<fTriggerBitConfig->GetJetHighBit() | 1<<fTriggerBitConfig->GetJetLowBit() | 1<<fTriggerBitConfig->GetBkgBit(), 8, 4);
154  AddL1TriggerAlgorithm(64, 103, 1<<fTriggerBitConfig->GetJetHighBit() | 1<<fTriggerBitConfig->GetJetLowBit() | 1<<fTriggerBitConfig->GetBkgBit(), 8, 4);
155  fConfigured = true;
156 }
157 
159 {
160  AliEMCALTriggerBitConfig* triggerBitConfig = new AliEMCALTriggerBitConfigNew();
161  SetTriggerBitConfig(triggerBitConfig);
162 
163  // Initialize patch finder
164  if (fPatchFinder) delete fPatchFinder;
166 
167  SetL0TriggerAlgorithm(0, 103, 1<<fTriggerBitConfig->GetLevel0Bit(), 2, 1);
168  AddL1TriggerAlgorithm(0, 63, 1<<fTriggerBitConfig->GetGammaHighBit() | 1<<fTriggerBitConfig->GetGammaLowBit(), 2, 1);
169  AddL1TriggerAlgorithm(64, 103, 1<<fTriggerBitConfig->GetGammaHighBit() | 1<<fTriggerBitConfig->GetGammaLowBit(), 2, 1);
170  AddL1TriggerAlgorithm(0, 63, 1<<fTriggerBitConfig->GetJetHighBit() | 1<<fTriggerBitConfig->GetJetLowBit(), 16, 4);
171  AddL1TriggerAlgorithm(64, 103, 1<<fTriggerBitConfig->GetJetHighBit() | 1<<fTriggerBitConfig->GetJetLowBit(), 8, 4);
172  fConfigured = true;
173 }
174 
176 {
177  AliEMCALTriggerBitConfig* triggerBitConfig = new AliEMCALTriggerBitConfigNew();
178  SetTriggerBitConfig(triggerBitConfig);
179 
180  // Initialize patch finder
181  if (fPatchFinder) delete fPatchFinder;
183 
184  SetL0TriggerAlgorithm(0, 103, 1<<fTriggerBitConfig->GetLevel0Bit(), 2, 1);
185  AddL1TriggerAlgorithm(0, 63, 1<<fTriggerBitConfig->GetGammaHighBit() | 1<<fTriggerBitConfig->GetGammaLowBit(), 2, 1);
186  AddL1TriggerAlgorithm(64, 103, 1<<fTriggerBitConfig->GetGammaHighBit() | 1<<fTriggerBitConfig->GetGammaLowBit(), 2, 1);
187  AddL1TriggerAlgorithm(0, 63, 1<<fTriggerBitConfig->GetJetHighBit() | 1<<fTriggerBitConfig->GetJetLowBit(), 8, 4);
188  AddL1TriggerAlgorithm(64, 103, 1<<fTriggerBitConfig->GetJetHighBit() | 1<<fTriggerBitConfig->GetJetLowBit(), 8, 4);
189  fConfigured = true;
190 }
191 
193 {
194  AliEMCALTriggerBitConfig* triggerBitConfig = new AliEMCALTriggerBitConfigNew();
195  SetTriggerBitConfig(triggerBitConfig);
196 
197  // Initialize patch finder
198  if (fPatchFinder) delete fPatchFinder;
200 
201  SetL0TriggerAlgorithm(0, 63, 1<<fTriggerBitConfig->GetLevel0Bit(), 2, 1);
202  AddL1TriggerAlgorithm(0, 63, 1<<fTriggerBitConfig->GetGammaHighBit() | 1<<fTriggerBitConfig->GetGammaLowBit(), 2, 1);
203  AddL1TriggerAlgorithm(0, 63, 1<<fTriggerBitConfig->GetJetHighBit() | 1<<fTriggerBitConfig->GetJetLowBit(), 16, 4);
204  fConfigured = true;
205 }
206 
208 {
209  AliEMCALTriggerBitConfig* triggerBitConfig = new AliEMCALTriggerBitConfigOld();
210  SetTriggerBitConfig(triggerBitConfig);
211 
212  // Initialize patch finder
213  if (fPatchFinder) delete fPatchFinder;
215 
216  SetL0TriggerAlgorithm(0, 63, 1<<fTriggerBitConfig->GetLevel0Bit(), 2, 1);
217  AddL1TriggerAlgorithm(0, 63, 1<<fTriggerBitConfig->GetGammaHighBit(), 2, 1);
218  AddL1TriggerAlgorithm(0, 63, 1<<fTriggerBitConfig->GetJetHighBit(), 16, 4);
219  fConfigured = true;
220 }
221 
223 {
224  AliEMCALTriggerBitConfig* triggerBitConfig = new AliEMCALTriggerBitConfigOld();
225  SetTriggerBitConfig(triggerBitConfig);
226 
227  // Initialize patch finder
228  if (fPatchFinder) delete fPatchFinder;
230 
231  SetL0TriggerAlgorithm(0, 63, 1<<fTriggerBitConfig->GetLevel0Bit(), 2, 1);
232  AddL1TriggerAlgorithm(0, 63, 1<<fTriggerBitConfig->GetGammaHighBit(), 2, 1);
233  AddL1TriggerAlgorithm(0, 63, 1<<fTriggerBitConfig->GetJetHighBit(), 16, 4);
234  fConfigured = true;
235 }
236 
238 {
239  AliEMCALTriggerBitConfig* triggerBitConfig = new AliEMCALTriggerBitConfigOld();
240  SetTriggerBitConfig(triggerBitConfig);
241 
242  // Initialize patch finder
243  if (fPatchFinder) delete fPatchFinder;
245 
246  SetL0TriggerAlgorithm(0, 63, 1<<fTriggerBitConfig->GetLevel0Bit(), 2, 1);
247  fConfigured = true;
248 }
249 
251 {
252  Short_t absId = 0;
253 
254  while (stream.good()) {
255  stream >> absId;
256  AddOfflineBadChannel(absId);
257  }
258 }
259 
261 {
262  std::ifstream file(fname);
264 }
265 
267 {
268  Short_t absId = -1;
269 
270  while (stream.good()) {
271  stream >> absId;
272  AddFastORBadChannel(absId);
273  }
274 }
275 
277 {
278  std::ifstream file(fname);
280 }
281 
283 {
284  if (absId < 0 || absId >= fFastORPedestal.GetSize()) {
285  AliWarning(Form("Abs. ID %d out of range (0,5000)", absId));
286  return;
287  }
288  fFastORPedestal[absId] = ped;
289 }
290 
292 {
293  Short_t absId = 0;
294  Float_t ped = 0;
295  while (stream.good()) {
296  stream >> ped;
297  SetFastORPedestal(absId, ped);
298  absId++;
299  }
300 }
301 
303 {
304  std::ifstream file(fname);
306 }
307 
309  fPatchAmplitudes->Reset();
310  fPatchADC->Reset();
311  fPatchADCSimple->Reset();
312  fLevel0TimeMap->Reset();
313  fTriggerBitMap->Reset();
315  memset(fL1ThresholdsOffline, 0, sizeof(ULong64_t) * 4);
316 }
317 
318 void AliEmcalTriggerMakerKernel::ReadTriggerData(AliVCaloTrigger *trigger){
319  trigger->Reset();
320  Int_t globCol=-1, globRow=-1;
321  Int_t adcAmp=-1, bitmap = 0;
322  while(trigger->Next()){
323  // get position in global 2x2 tower coordinates
324  // A0 left bottom (0,0)
325  trigger->GetPosition(globCol, globRow);
326  Int_t absId = -1;
327  fGeometry->GetAbsFastORIndexFromPositionInEMCAL(globCol, globRow, absId);
328 
329  // trigger bits can also occur on online masked fastors. Therefore trigger
330  // bits are handled before ADC values, and independently whether fastor is
331  // masked or not
332  trigger->GetTriggerBits(bitmap);
333  try {
334  (*fTriggerBitMap)(globCol, globRow) = bitmap;
335  }
337  std::string dirstring = e.GetDirection() == AliEMCALTriggerDataGrid<int>::OutOfBoundsException::kColDir ? "Col" : "Row";
338  AliErrorStream() << "Trigger maker task - filling trigger bit grid - index out-of-bounds in " << dirstring << ": " << e.GetIndex() << std::endl;
339  }
340 
341  // also Level0 times need to be handled without masking of the fastor ...
342  // @TODO cross check
343  Int_t nl0times(0);
344  trigger->GetNL0Times(nl0times);
345  if(nl0times){
346  TArrayI l0times(nl0times);
347  trigger->GetL0Times(l0times.GetArray());
348  for(int itime = 0; itime < nl0times; itime++){
349  try{
350  (*fLevel0TimeMap)(globCol,globRow) = static_cast<Char_t>(l0times[itime]);
351  break;
352  }
354  std::string dirstring = e.GetDirection() == AliEMCALTriggerDataGrid<char>::OutOfBoundsException::kColDir ? "Col" : "Row";
355  AliErrorStream() << "Trigger maker task - filling trigger bit grid - index out-of-bounds in " << dirstring << ": " << e.GetIndex() << std::endl;
356  }
357  }
358  }
359 
360  // exclude channel completely if it is masked as hot channel
361  if (fBadChannels.find(absId) != fBadChannels.end()){
362  AliDebugStream(1) << "Found ADC for masked fastor " << absId << ", rejecting" << std::endl;
363  continue;
364  }
365  // for some strange reason some ADC amps are initialized in reconstruction
366  // as -1, neglect those
367  trigger->GetL1TimeSum(adcAmp);
368  if (adcAmp < 0) adcAmp = 0;
369 
370  if (adcAmp >= fMinL1FastORAmp) {
371  try {
372  (*fPatchADC)(globCol,globRow) = adcAmp;
373  }
375  std::string dirstring = e.GetDirection() == AliEMCALTriggerDataGrid<double>::OutOfBoundsException::kColDir ? "Col" : "Row";
376  AliErrorStream() << "Trigger maker task - filling trigger bit grid - index out-of-bounds in " << dirstring << ": " << e.GetIndex() << std::endl;
377  }
378  }
379 
380  // Handling for L0 triggers
381  // For the ADC value we use fCaloTriggers->GetAmplitude()
382  // In data, all patches which have 4 TRUs with proper level0 times are
383  // valid trigger patches. Therefore we need to check all neighbors for
384  // the level0 times, not only the bottom left. In order to obtain this
385  // information, a lookup table with the L0 times for each TRU is created
386  Float_t amplitude(0);
387  trigger->GetAmplitude(amplitude);
388  amplitude *= 4; // values are shifted by 2 bits to fit in a 10 bit word (on the hardware side)
389  amplitude -= fFastORPedestal[absId];
390  if(amplitude < 0) amplitude = 0;
391  if (amplitude >= fMinL0FastORAmp) {
392  try{
393  (*fPatchAmplitudes)(globCol,globRow) = amplitude;
394  }
396  std::string dirstring = e.GetDirection() == AliEMCALTriggerDataGrid<int>::OutOfBoundsException::kColDir ? "Col" : "Row";
397  AliErrorStream() << "Trigger maker task - filling trigger bit grid - index out-of-bounds in " << dirstring << ": " << e.GetIndex() << std::endl;
398  }
399  }
400  }
401 }
402 
403 void AliEmcalTriggerMakerKernel::ReadCellData(AliVCaloCells *cells){
404  // fill the patch ADCs from cells
405  Int_t nCell = cells->GetNumberOfCells();
406  for(Int_t iCell = 0; iCell < nCell; ++iCell) {
407  // get the cell info, based in index in array
408  Short_t cellId = cells->GetCellNumber(iCell);
409 
410  // Check bad channel map
411  if (fOfflineBadChannels.find(cellId) != fOfflineBadChannels.end()) {
412  AliDebugStream(1) << "Cell " << cellId << " masked as bad channel, rejecting." << std::endl;
413  continue;
414  }
415 
416  Double_t amp = cells->GetAmplitude(iCell),
417  celltime = cells->GetTime(iCell);
418  if(celltime < fCellTimeLimits[0] || celltime > fCellTimeLimits[1]) continue;
419  if(amp < fMinCellAmplitude) continue;
420  // get position
421  Int_t absId=-1;
422  fGeometry->GetFastORIndexFromCellIndex(cellId, absId);
424  // Exclude FEE amplitudes from cells which are within a TRU which is masked at
425  // online level. Using this the online acceptance can be applied to offline
426  // patches as well.
427  if(fBadChannels.find(absId) != fBadChannels.end()){
428  AliDebugStream(1) << "Cell " << cellId << " corresponding to masked fastor " << absId << ", rejecting." << std::endl;
429  continue;
430  }
431  }
432  Int_t globCol=-1, globRow=-1;
433  fGeometry->GetPositionInEMCALFromAbsFastORIndex(absId, globCol, globRow);
434  // add
435  amp /= fADCtoGeV;
436  try {
437  if (amp >= fMinCellAmp) (*fPatchADCSimple)(globCol,globRow) += amp;
438  }
440  }
441  }
442 
443  // Apply energy smearing (if enabled)
445  AliDebugStream(1) << "Trigger Maker: Apply energy smearing" << std::endl;
446  for(int icol = 0; icol < fPatchADCSimple->GetNumberOfCols(); icol++){
447  for(int irow = 0; irow < fPatchADCSimple->GetNumberOfRows(); irow++){
448  double energyorig = (*fPatchADCSimple)(icol, irow) * fADCtoGeV; // Apply smearing in GeV
449  double energysmear = energyorig;
450  if(energyorig > fSmearThreshold){
451  double mean = fSmearModelMean->Eval(energyorig), sigma = fSmearModelSigma->Eval(energyorig);
452  energysmear = gRandom->Gaus(mean, sigma);
453  if(energysmear < 0) energysmear = 0; // only accept positive or 0 energy values
454  AliDebugStream(1) << "Original energy " << energyorig << ", mean " << mean << ", sigma " << sigma << ", smeared " << energysmear << std::endl;
455  }
456  (*fPatchEnergySimpleSmeared)(icol, irow) = energysmear;
457  }
458  }
459  AliDebugStream(1) << "Smearing done" << std::endl;
460  }
461 }
462 
464  // get the V0 value and compute and set the offline thresholds
465  // get V0, compute thresholds and save them as global parameters
466  ULong64_t v0S = vzerodata->GetTriggerChargeA() + vzerodata->GetTriggerChargeC();
467  for (Int_t i = 0; i < 4; ++i) {
468  // A*V0^2/2^32+B*V0/2^16+C
469  fL1ThresholdsOffline[i]= ( ((ULong64_t)fThresholdConstants[i][0]) * v0S * v0S ) >> 32;
470  fL1ThresholdsOffline[i] += ( ((ULong64_t)fThresholdConstants[i][1]) * v0S ) >> 16;
471  fL1ThresholdsOffline[i] += ((ULong64_t)fThresholdConstants[i][2]);
472  }
473 }
474 
475 void AliEmcalTriggerMakerKernel::CreateTriggerPatches(const AliVEvent *inputevent, std::vector<AliEMCALTriggerPatchInfo> &outputcont, Bool_t useL0amp){
476  //std::cout << "Finding trigger patches" << std::endl;
477  //AliEMCALTriggerPatchInfo *trigger, *triggerMainJet, *triggerMainGamma, *triggerMainLevel0;
478  //AliEMCALTriggerPatchInfo *triggerMainJetSimple, *triggerMainGammaSimple;
479 
480  if (useL0amp) {
482  }
483  else {
484  fADCtoGeV = EMCALTrigger::kEMCL1ADCtoGeV;
485  }
486 
487  Double_t vertexpos[3];
488  inputevent->GetPrimaryVertex()->GetXYZ(vertexpos);
489  TVector3 vertexvec(vertexpos);
490 
491  Int_t isMC = fIsMC ? 1 : 0;
492  Int_t offset = (1 - isMC) * fTriggerBitConfig->GetTriggerTypesEnd();
493 
494  // Create trigger bit masks. They are needed later to remove
495  // trigger bits from the trigger bit mask for non-matching patch types
496  Int_t jetPatchMask = 1 << fTriggerBitConfig->GetJetHighBit()
497  | 1 << fTriggerBitConfig->GetJetLowBit()
498  | 1 << (fTriggerBitConfig->GetJetHighBit() + fTriggerBitConfig->GetTriggerTypesEnd())
499  | 1 << (fTriggerBitConfig->GetJetLowBit() + fTriggerBitConfig->GetTriggerTypesEnd()),
500  gammaPatchMask = 1 << fTriggerBitConfig->GetGammaHighBit()
501  | 1 << fTriggerBitConfig->GetGammaLowBit()
502  | 1 << (fTriggerBitConfig->GetGammaHighBit() + fTriggerBitConfig->GetTriggerTypesEnd())
503  | 1 << (fTriggerBitConfig->GetGammaLowBit() + fTriggerBitConfig->GetTriggerTypesEnd()),
504  bkgPatchMask = 1 << fTriggerBitConfig->GetBkgBit();
505  //l0PatchMask = 1 << fTriggerBitConfig->GetLevel0Bit();
506 
507  std::vector<AliEMCALTriggerRawPatch> patches;
508  if (fPatchFinder) {
509  if (useL0amp) {
510  patches = fPatchFinder->FindPatches(*fPatchAmplitudes, *fPatchADCSimple);
511  }
512  else {
513  patches = fPatchFinder->FindPatches(*fPatchADC, *fPatchADCSimple);
514  }
515  }
516  outputcont.clear();
517  for(std::vector<AliEMCALTriggerRawPatch>::iterator patchit = patches.begin(); patchit != patches.end(); ++patchit){
518  // Apply offline and recalc selection
519  // Remove unwanted bits from the online bits (gamma bits from jet patches and vice versa)
520  Int_t offlinebits = 0, onlinebits = (*fTriggerBitMap)(patchit->GetColStart(), patchit->GetRowStart());
521  if(HasPHOSOverlap(*patchit)) continue;
522  if(IsGammaPatch(*patchit)){
523  if(patchit->GetADC() > fL1ThresholdsOffline[1]) SETBIT(offlinebits, AliEMCALTriggerPatchInfo::kRecalcOffset + fTriggerBitConfig->GetGammaHighBit());
524  if(patchit->GetOfflineADC() > fL1ThresholdsOffline[1]) SETBIT(offlinebits, AliEMCALTriggerPatchInfo::kOfflineOffset + fTriggerBitConfig->GetGammaHighBit());
525  if(patchit->GetADC() > fL1ThresholdsOffline[3]) SETBIT(offlinebits, AliEMCALTriggerPatchInfo::kRecalcOffset + fTriggerBitConfig->GetGammaLowBit());
526  if(patchit->GetOfflineADC() > fL1ThresholdsOffline[3]) SETBIT(offlinebits, AliEMCALTriggerPatchInfo::kOfflineOffset + fTriggerBitConfig->GetGammaLowBit());
527  onlinebits &= gammaPatchMask;
528  }
529  if (IsJetPatch(*patchit)){
530  if(patchit->GetADC() > fL1ThresholdsOffline[0]) SETBIT(offlinebits, AliEMCALTriggerPatchInfo::kRecalcOffset + fTriggerBitConfig->GetJetHighBit());
531  if(patchit->GetOfflineADC() > fL1ThresholdsOffline[0]) SETBIT(offlinebits, AliEMCALTriggerPatchInfo::kOfflineOffset + fTriggerBitConfig->GetJetHighBit());
532  if(patchit->GetADC() > fL1ThresholdsOffline[2]) SETBIT(offlinebits, AliEMCALTriggerPatchInfo::kRecalcOffset + fTriggerBitConfig->GetJetLowBit());
533  if(patchit->GetOfflineADC() > fL1ThresholdsOffline[2]) SETBIT(offlinebits, AliEMCALTriggerPatchInfo::kOfflineOffset + fTriggerBitConfig->GetJetLowBit());
534  onlinebits &= jetPatchMask;
535  }
536  if (IsBkgPatch(*patchit)){
537  if(patchit->GetADC() > fBkgThreshold) SETBIT(offlinebits, AliEMCALTriggerPatchInfo::kRecalcOffset + fTriggerBitConfig->GetBkgBit());
538  if(patchit->GetOfflineADC() > fBkgThreshold) SETBIT(offlinebits, AliEMCALTriggerPatchInfo::kOfflineOffset + fTriggerBitConfig->GetBkgBit());
539  onlinebits &= bkgPatchMask;
540  }
541  // convert
542  AliEMCALTriggerPatchInfo fullpatch;
543  fullpatch.Initialize(patchit->GetColStart(), patchit->GetRowStart(),
544  patchit->GetPatchSize(), patchit->GetADC(), patchit->GetOfflineADC(), patchit->GetOfflineADC() * fADCtoGeV,
545  onlinebits | offlinebits, vertexvec, fGeometry);
546  fullpatch.SetTriggerBitConfig(fTriggerBitConfig);
547  fullpatch.SetOffSet(offset);
549  // Add smeared energy
550  double energysmear = 0;
551  for(int icol = 0; icol < fullpatch.GetPatchSize(); icol++){
552  for(int irow = 0; irow < fullpatch.GetPatchSize(); irow++){
553  energysmear += (*fPatchEnergySimpleSmeared)(fullpatch.GetColStart() + icol, fullpatch.GetRowStart() + irow);
554  }
555  }
556  AliDebugStream(1) << "Patch size(" << fullpatch.GetPatchSize() <<") energy " << fullpatch.GetPatchE() << " smeared " << energysmear << std::endl;
557  fullpatch.SetSmearedEnergy(energysmear);
558  }
559  outputcont.push_back(fullpatch);
560  }
561 
562  // Find Level0 patches
563  std::vector<AliEMCALTriggerRawPatch> l0patches;
564  if (fLevel0PatchFinder) l0patches = fLevel0PatchFinder->FindPatches(*fPatchAmplitudes, *fPatchADCSimple);
565  for(std::vector<AliEMCALTriggerRawPatch>::iterator patchit = l0patches.begin(); patchit != l0patches.end(); ++patchit){
566  Int_t offlinebits = 0, onlinebits = 0;
567  if(HasPHOSOverlap(*patchit)) continue;
568  ELevel0TriggerStatus_t L0status = CheckForL0(patchit->GetColStart(), patchit->GetRowStart());
569  if (L0status == kNotLevel0) continue;
570  if (L0status == kLevel0Fired) SETBIT(onlinebits, fTriggerBitConfig->GetLevel0Bit());
571  if (patchit->GetADC() > fL0Threshold) SETBIT(offlinebits, AliEMCALTriggerPatchInfo::kRecalcOffset + fTriggerBitConfig->GetLevel0Bit());
572  if (patchit->GetOfflineADC() > fL0Threshold) SETBIT(offlinebits, AliEMCALTriggerPatchInfo::kOfflineOffset + fTriggerBitConfig->GetLevel0Bit());
573 
574  AliEMCALTriggerPatchInfo fullpatch;
575  fullpatch.Initialize(patchit->GetColStart(), patchit->GetRowStart(),
576  patchit->GetPatchSize(), patchit->GetADC(), patchit->GetOfflineADC(), patchit->GetOfflineADC() * fADCtoGeV,
577  onlinebits | offlinebits, vertexvec, fGeometry);
578  fullpatch.SetTriggerBitConfig(fTriggerBitConfig);
580  // Add smeared energy
581  double energysmear = 0;
582  for(int icol = 0; icol < fullpatch.GetPatchSize(); icol++){
583  for(int irow = 0; irow < fullpatch.GetPatchSize(); irow++){
584  energysmear += (*fPatchEnergySimpleSmeared)(fullpatch.GetColStart() + icol, fullpatch.GetRowStart() + irow);
585  }
586  }
587  fullpatch.SetSmearedEnergy(energysmear);
588  }
589  outputcont.push_back(fullpatch);
590  }
591  // std::cout << "Finished finding trigger patches" << std::endl;
592 }
593 
595  double amp = 0;
596  try {
597  amp = (*fPatchAmplitudes)(col, row);
599 
600  }
601  return amp;
602 }
603 
605  double adc = 0;
606  try {
607  adc = (*fPatchADC)(col, row);
609 
610  }
611  return adc;
612 }
613 
615  double adc = 0;
616  try {
617  adc = (*fPatchADC)(col, row) * EMCALTrigger::kEMCL1ADCtoGeV;
619 
620  }
621  return adc;
622 }
623 
625  double adc = 0;
626  try {
627  adc = (*fPatchADCSimple)(col, row);
629 
630  }
631  return adc;
632 }
633 
635  double adc = 0;
636  try {
637  adc = (*fPatchADCSimple)(col, row) * fADCtoGeV;
639 
640  }
641  return adc;
642 }
643 
645  double adc = 0;
647  try {
648  adc = (*fPatchEnergySimpleSmeared)(col, row);
650 
651  }
652  }
653  return adc;
654 }
655 
657  return fPatchADC->GetNumberOfRows();
658 }
659 
662 
663  if(col < 0 || row < 0){
664  AliError(Form("Patch outside range [col %d, row %d]", col, row));
665  return kNotLevel0;
666  }
667  Int_t truref(-1), trumod(-1), absFastor(-1), adc(-1);
668  fGeometry->GetAbsFastORIndexFromPositionInEMCAL(col, row, absFastor);
669  fGeometry->GetTRUFromAbsFastORIndex(absFastor, truref, adc);
670  int nvalid(0);
671  const int kNRowsPhi = fGeometry->GetNTotalTRU() * 2;
672  for(int ipos = 0; ipos < 2; ipos++){
673  if(row + ipos >= kNRowsPhi) continue; // boundary check
674  for(int jpos = 0; jpos < 2; jpos++){
675  if(col + jpos >= kColsEta) continue; // boundary check
676  // Check whether we are in the same TRU
677  trumod = -1;
678  fGeometry->GetAbsFastORIndexFromPositionInEMCAL(col+jpos, row+ipos, absFastor);
679  fGeometry->GetTRUFromAbsFastORIndex(absFastor, trumod, adc);
680  if(trumod != truref) {
681  result = kNotLevel0;
682  return result;
683  }
684  if(col + jpos >= kColsEta) AliError(Form("Boundary error in col [%d, %d + %d]", col + jpos, col, jpos));
685  if(row + ipos >= kNRowsPhi) AliError(Form("Boundary error in row [%d, %d + %d]", row + ipos, row, ipos));
686  Char_t l0times = (*fLevel0TimeMap)(col + jpos,row + ipos);
687  if(l0times > fL0MinTime && l0times < fL0MaxTime) nvalid++;
688  }
689  }
690  if (nvalid == 4) result = kLevel0Fired;
691  return result;
692 }
693 
695  fBadChannels.clear();
696 }
697 
699  fOfflineBadChannels.clear();
700 }
701 
702 Bool_t AliEmcalTriggerMakerKernel::IsGammaPatch(const AliEMCALTriggerRawPatch &patch) const {
703  ULong_t bitmask = patch.GetBitmask(), testmask = 1 << fTriggerBitConfig->GetGammaHighBit() | 1 << fTriggerBitConfig->GetGammaLowBit();
704  return bitmask & testmask;
705 }
706 
707 Bool_t AliEmcalTriggerMakerKernel::IsJetPatch(const AliEMCALTriggerRawPatch &patch) const {
708  ULong_t bitmask = patch.GetBitmask(), testmask = 1 << fTriggerBitConfig->GetJetHighBit() | 1 << fTriggerBitConfig->GetJetLowBit();
709  return bitmask & testmask;
710 }
711 
712 Bool_t AliEmcalTriggerMakerKernel::IsBkgPatch(const AliEMCALTriggerRawPatch &patch) const {
713  ULong_t bitmask = patch.GetBitmask(), testmask = 1 << fTriggerBitConfig->GetBkgBit();
714  return bitmask & testmask;
715 }
716 
717 void AliEmcalTriggerMakerKernel::SetTriggerBitConfig(const AliEMCALTriggerBitConfig *const config) {
718  if (config == fTriggerBitConfig) return;
720  fTriggerBitConfig = config;
721 }
722 
723 bool AliEmcalTriggerMakerKernel::HasPHOSOverlap(const AliEMCALTriggerRawPatch &patch) const {
724  const int kEtaMinPhos = 16, kEtaMaxPhos = 31, kPhiMinPhos = 64, kPhiMaxPhos = 99;
725  if(patch.GetRowStart() + patch.GetPatchSize() -1 < kPhiMinPhos) return false; // EMCAL Patch
726  if(patch.GetRowStart() > kPhiMaxPhos) return false; // DCAL 1/3 supermodule
727  if(patch.GetColStart() + patch.GetPatchSize() -1 < kEtaMinPhos) return false;
728  if(patch.GetColStart() > kEtaMaxPhos) return false;
729  return true;
730 }
void Reset()
Reset all data grids and VZERO-dependent L1 thresholds.
Int_t fBkgThreshold
threshold for the background patches (8x8)
ELevel0TriggerStatus_t CheckForL0(Int_t col, Int_t row) const
Accept trigger patch as Level0 patch.
double Double_t
Definition: External.C:58
Double_t fCellTimeLimits[2]
Maximum allowed abs cell time (default [0] = - 10000, [1] = 10000)
Double_t fMinCellAmplitude
Minimum amplitude in cell required to be considered for filling the data grid.
Bool_t IsGammaPatch(const AliEMCALTriggerRawPatch &patch) const
Check from the bitmask whether the patch is a gamma patch.
void ConfigureForPbPb2015()
Configure the class for 2015 PbPb.
void ConfigureForPP2015()
Configure the class for 2015 pp.
Bool_t IsBkgPatch(const AliEMCALTriggerRawPatch &patch) const
Check from the bitmask whether the patch is a background patch.
char Char_t
Definition: External.C:18
bool HasPHOSOverlap(const AliEMCALTriggerRawPatch &patch) const
AliEMCALTriggerDataGrid< int > * fTriggerBitMap
! Map of trigger bits
void ReadFastORBadChannelFromStream(std::istream &stream)
Read the FastOR bad channel map from a standard stream.
TArrayF fFastORPedestal
FastOR pedestal.
void AddFastORBadChannel(Short_t absId)
Add a FastOR bad channel to the list.
void SetTriggerBitConfig(const AliEMCALTriggerBitConfig *const config)
Set the trigger bit configuration applied for the given data set.
void ConfigureForPbPb2011()
Configure the class for 2011 PbPb.
Bool_t fConfigured
Switch specifying whether the trigger maker kernel has been configured for a given data set...
void Init()
Initialize the trigger maker Kernel.
Int_t fMinCellAmp
Minimum offline amplitude of the cells used to generate the patches.
void CreateTriggerPatches(const AliVEvent *inputevent, std::vector< AliEMCALTriggerPatchInfo > &outputcont, Bool_t useL0amp=kFALSE)
Run patch finders on input data.
void ClearFastORBadChannels()
Clear FastOR bad channel list.
TRandom * gRandom
void ConfigureForPP2011()
Configure the class for 2011 pp.
void ReadFastORBadChannelFromFile(const char *fname)
Read the FastOR bad channel map from a text file.
Bool_t fApplyOnlineBadChannelsToOffline
Apply online bad channels to offline ADC values.
void ReadTriggerData(AliVCaloTrigger *trigger)
Read the calo trigger data.
Int_t fMinL1FastORAmp
Minimum L1 amplitude of the FastORs used to generate the patches.
const AliEMCALTriggerBitConfig * fTriggerBitConfig
Trigger bit configuration, aliroot-dependent.
const AliEMCALGeometry * fGeometry
! Underlying EMCAL geometry
Double_t * sigma
ULong64_t fL1ThresholdsOffline[4]
container for V0-dependent offline thresholds
void ConfigureForPP20158x8()
Configure the class for 2015 pp.
int Int_t
Definition: External.C:63
void ReadOfflineBadChannelFromFile(const char *fname)
Read the offline bad channel map from a text file.
unsigned int UInt_t
Definition: External.C:33
void ConfigureForPP2012()
Configure the class for 2012 pp.
Int_t fThresholdConstants[4][3]
simple offline trigger thresholds constants
float Float_t
Definition: External.C:68
virtual ~AliEmcalTriggerMakerKernel()
Destructor.
double GetTriggerChannelADC(Int_t col, Int_t row) const
Get ADC value of a given trigger channel (in col-row space)
Double_t fSmearThreshold
Smear threshold: Only cell energies above threshold are smeared.
Double_t fADCtoGeV
! Conversion factor from ADC to GeV
void AddL1TriggerAlgorithm(Int_t rowmin, Int_t rowmax, UInt_t bitmask, Int_t patchSize, Int_t subregionSize)
void SetL0TriggerAlgorithm(Int_t rowmin, Int_t rowmax, UInt_t bitmask, Int_t patchSize, Int_t subregionSize)
Set the L0 algorithm.
void ReadOfflineBadChannelFromStream(std::istream &stream)
Read the offline bad channel map from a standard stream.
void SetFastORPedestal(Short_t absId, Float_t ped)
Set the pedestal value for a FastOR.
unsigned long ULong_t
Definition: External.C:38
void AddOfflineBadChannel(Short_t absId)
Add an offline bad channel to the set.
double GetTriggerChannelEnergy(Int_t col, Int_t row) const
Get energy of the trigger channel estimated from cells (in col-row space)
std::set< Short_t > fBadChannels
Container of bad channels.
Int_t fDebugLevel
Int_t fL0Threshold
threshold for the L0 patches (2x2)
AliEMCALTriggerDataGrid< double > * fPatchAmplitudes
! TRU Amplitudes (for L0)
Manager for constants used in the trigger maker.
short Short_t
Definition: External.C:23
void BuildL1ThresholdsOffline(const AliVVZERO *vzdata)
Build VZERO-dependent thresholds for the offline trigger.
AliEMCALTriggerDataGrid< double > * fPatchADC
! ADC values map
Bool_t isMC
Int_t fMinL0FastORAmp
Minimum L0 amplitude of the FastORs used to generate the patches.
std::set< Short_t > fOfflineBadChannels
Abd ID of offline bad channels.
AliEMCALTriggerPatchFinder< double > * fPatchFinder
The actual patch finder.
void ClearOfflineBadChannels()
Clear offline bad channel list.
TFile * file
TList with histograms for a given trigger.
double GetTriggerChannelADCSimple(Int_t col, Int_t row) const
Get ADC value of trigger channel estimated from cell energies.
double GetTriggerChannelEnergyRough(Int_t col, Int_t row) const
Get estimated energy of the trigger channel based on ADC measurement (in col-row space) ...
double GetTriggerChannelEnergySmeared(Int_t col, Int_t row) const
Get (simulated) smeared energy of a trigger channel estimated based on the measured energy from cells...
AliEMCALTriggerDataGrid< double > * fPatchADCSimple
! patch map for simple offline trigger
Kernel of the EMCAL trigger patch maker.
void ReadFastORPedestalFromFile(const char *fname)
Read the FastOR pedestals from a text file.
AliEMCALTriggerDataGrid< char > * fLevel0TimeMap
! Map needed to store the level0 times
AliEMCALTriggerAlgorithm< double > * fLevel0PatchFinder
Patch finder for Level0 patches.
Bool_t IsJetPatch(const AliEMCALTriggerRawPatch &patch) const
Check from the bitmask whether the patch is a jet patch.
bool Bool_t
Definition: External.C:53
TF1 * fSmearModelMean
Smearing parameterization for the mean.
double GetDataGridDimensionRows() const
Get the dimension of the underlying data grids in row direction.
void ReadFastORPedestalFromStream(std::istream &stream)
Read the FastOR pedestals from a standard stream.
void ReadCellData(AliVCaloCells *cells)
Read the EMCAL cell data.
void ConfigureForPPb2013()
Configure the class for 2013 pPb.
AliEMCALTriggerDataGrid< double > * fPatchEnergySimpleSmeared
! Data grid for smeared energy values from cell energies
double GetL0TriggerChannelAmplitude(Int_t col, Int_t row) const
Get L0 amplitude of a given trigger channel (in col-row space)
TF1 * fSmearModelSigma
Smearing parameterization for the width.
const Double_t kEMCL0ADCtoGeV_AP