AliPhysics  b4fea5f (b4fea5f)
 All Classes Namespaces Files Functions Variables Typedefs Enumerations Enumerator Friends Macros Groups Pages
AliEmcalTriggerMakerKernel.cxx
Go to the documentation of this file.
1 /**************************************************************************
2  * Copyright(c) 1998-2015, ALICE Experiment at CERN, All rights reserved. *
3  * *
4  * Author: The ALICE Off-line Project. *
5  * Contributors are mentioned in the code where appropriate. *
6  * *
7  * Permission to use, copy, modify and distribute this software and its *
8  * documentation strictly for non-commercial purposes is hereby granted *
9  * without fee, provided that the above copyright notice appears in all *
10  * copies and that both the copyright notice and this permission notice *
11  * appear in the supporting documentation. The authors make no claims *
12  * about the suitability of this software for any purpose. It is *
13  * provided "as is" without express or implied warranty. *
14  **************************************************************************/
15 #include <iostream>
16 #include <vector>
17 #include <cstring>
18 #include <fstream>
19 
20 #include <TArrayI.h>
21 #include <TObjArray.h>
22 
23 #include "AliAODCaloTrigger.h"
24 #include "AliEMCALGeometry.h"
25 #include "AliEMCALTriggerConstants.h"
26 #include "AliEMCALTriggerDataGrid.h"
27 #include "AliEMCALTriggerPatchInfo.h"
28 #include "AliEMCALTriggerPatchFinder.h"
29 #include "AliEMCALTriggerAlgorithm.h"
30 #include "AliEMCALTriggerRawPatch.h"
33 #include "AliLog.h"
34 #include "AliVCaloCells.h"
35 #include "AliVCaloTrigger.h"
36 #include "AliVEvent.h"
37 #include "AliVVZERO.h"
38 
42 
44  TObject(),
45  fBadChannels(),
46  fOfflineBadChannels(),
47  fFastORPedestal(5000),
48  fTriggerBitConfig(NULL),
49  fPatchFinder(NULL),
50  fLevel0PatchFinder(NULL),
51  fL0MinTime(7),
52  fL0MaxTime(10),
53  fMinCellAmp(0),
54  fMinL0FastORAmp(0),
55  fMinL1FastORAmp(0),
56  fBkgThreshold(-1),
57  fL0Threshold(0),
58  fIsMC(kFALSE),
59  fDebugLevel(0),
60  fMaxAbsCellTime(1.),
61  fMinCellAmplitude(0.),
62  fApplyOnlineBadChannelsToOffline(kFALSE),
63  fConfigured(kFALSE),
64  fGeometry(NULL),
65  fPatchAmplitudes(NULL),
66  fPatchADCSimple(NULL),
67  fPatchADC(NULL),
68  fLevel0TimeMap(NULL),
69  fTriggerBitMap(NULL),
70  fADCtoGeV(1.)
71 {
72  memset(fThresholdConstants, 0, sizeof(Int_t) * 12);
73  memset(fL1ThresholdsOffline, 0, sizeof(ULong64_t) * 4);
74 }
75 
77  delete fPatchAmplitudes;
78  delete fPatchADCSimple;
79  delete fPatchADC;
80  delete fLevel0TimeMap;
81  delete fTriggerBitMap;
82  delete fPatchFinder;
83  delete fLevel0PatchFinder;
85 }
86 
88  if (!fTriggerBitConfig) {
89  AliWarning("Trigger bit configuration was not provided! Assuming new bit configuration (>= 2013).");
90  AliEMCALTriggerBitConfig* triggerBitConfig = new AliEMCALTriggerBitConfigNew();
91  SetTriggerBitConfig(triggerBitConfig);
92  }
93 
99 
100  // Allocate containers for the ADC values
101  int nrows = fGeometry->GetNTotalTRU() * 2;
102  std::cout << "Allocating channel grid with 48 columns in eta and " << nrows << " rows in phi" << std::endl;
103  fPatchAmplitudes->Allocate(48, nrows);
104  fPatchADC->Allocate(48, nrows);
105  fPatchADCSimple->Allocate(48, nrows);
106  fLevel0TimeMap->Allocate(48, nrows);
107  fTriggerBitMap->Allocate(48, nrows);
108 }
109 
110 void AliEmcalTriggerMakerKernel::AddL1TriggerAlgorithm(Int_t rowmin, Int_t rowmax, UInt_t bitmask, Int_t patchSize, Int_t subregionSize)
111 {
113  AliEMCALTriggerAlgorithm<double> *trigger = new AliEMCALTriggerAlgorithm<double>(rowmin, rowmax, bitmask);
114  trigger->SetPatchSize(patchSize);
115  trigger->SetSubregionSize(subregionSize);
116  fPatchFinder->AddTriggerAlgorithm(trigger);
117 }
118 
119 void AliEmcalTriggerMakerKernel::SetL0TriggerAlgorithm(Int_t rowmin, Int_t rowmax, UInt_t bitmask, Int_t patchSize, Int_t subregionSize)
120 {
122  fLevel0PatchFinder = new AliEMCALTriggerAlgorithm<double>(rowmin, rowmax, bitmask);
123  fLevel0PatchFinder->SetPatchSize(patchSize);
124  fLevel0PatchFinder->SetSubregionSize(subregionSize);
125 }
126 
128 {
129  AliEMCALTriggerBitConfig* triggerBitConfig = new AliEMCALTriggerBitConfigNew();
130  SetTriggerBitConfig(triggerBitConfig);
131 
132  // Initialize patch finder
133  if (fPatchFinder) delete fPatchFinder;
135 
136  SetL0TriggerAlgorithm(0, 103, 1<<fTriggerBitConfig->GetLevel0Bit(), 2, 1);
137  AddL1TriggerAlgorithm(0, 63, 1<<fTriggerBitConfig->GetGammaHighBit() | 1<<fTriggerBitConfig->GetGammaLowBit(), 2, 1);
138  AddL1TriggerAlgorithm(64, 103, 1<<fTriggerBitConfig->GetGammaHighBit() | 1<<fTriggerBitConfig->GetGammaLowBit(), 2, 1);
139  AddL1TriggerAlgorithm(0, 63, 1<<fTriggerBitConfig->GetJetHighBit() | 1<<fTriggerBitConfig->GetJetLowBit() | 1<<fTriggerBitConfig->GetBkgBit(), 8, 4);
140  AddL1TriggerAlgorithm(64, 103, 1<<fTriggerBitConfig->GetJetHighBit() | 1<<fTriggerBitConfig->GetJetLowBit() | 1<<fTriggerBitConfig->GetBkgBit(), 8, 4);
141  fConfigured = true;
142 }
143 
145 {
146  AliEMCALTriggerBitConfig* triggerBitConfig = new AliEMCALTriggerBitConfigNew();
147  SetTriggerBitConfig(triggerBitConfig);
148 
149  // Initialize patch finder
150  if (fPatchFinder) delete fPatchFinder;
152 
153  SetL0TriggerAlgorithm(0, 103, 1<<fTriggerBitConfig->GetLevel0Bit(), 2, 1);
154  AddL1TriggerAlgorithm(0, 63, 1<<fTriggerBitConfig->GetGammaHighBit() | 1<<fTriggerBitConfig->GetGammaLowBit(), 2, 1);
155  AddL1TriggerAlgorithm(64, 103, 1<<fTriggerBitConfig->GetGammaHighBit() | 1<<fTriggerBitConfig->GetGammaLowBit(), 2, 1);
156  AddL1TriggerAlgorithm(0, 63, 1<<fTriggerBitConfig->GetJetHighBit() | 1<<fTriggerBitConfig->GetJetLowBit(), 16, 4);
157  AddL1TriggerAlgorithm(64, 103, 1<<fTriggerBitConfig->GetJetHighBit() | 1<<fTriggerBitConfig->GetJetLowBit(), 8, 4);
158  fConfigured = true;
159 }
160 
162 {
163  AliEMCALTriggerBitConfig* triggerBitConfig = new AliEMCALTriggerBitConfigNew();
164  SetTriggerBitConfig(triggerBitConfig);
165 
166  // Initialize patch finder
167  if (fPatchFinder) delete fPatchFinder;
169 
170  SetL0TriggerAlgorithm(0, 63, 1<<fTriggerBitConfig->GetLevel0Bit(), 2, 1);
171  AddL1TriggerAlgorithm(0, 63, 1<<fTriggerBitConfig->GetGammaHighBit() | 1<<fTriggerBitConfig->GetGammaLowBit(), 2, 1);
172  AddL1TriggerAlgorithm(0, 63, 1<<fTriggerBitConfig->GetJetHighBit() | 1<<fTriggerBitConfig->GetJetLowBit(), 16, 4);
173  fConfigured = true;
174 }
175 
177 {
178  AliEMCALTriggerBitConfig* triggerBitConfig = new AliEMCALTriggerBitConfigOld();
179  SetTriggerBitConfig(triggerBitConfig);
180 
181  // Initialize patch finder
182  if (fPatchFinder) delete fPatchFinder;
184 
185  SetL0TriggerAlgorithm(0, 63, 1<<fTriggerBitConfig->GetLevel0Bit(), 2, 1);
186  AddL1TriggerAlgorithm(0, 63, 1<<fTriggerBitConfig->GetGammaHighBit(), 2, 1);
187  AddL1TriggerAlgorithm(0, 63, 1<<fTriggerBitConfig->GetJetHighBit(), 16, 4);
188  fConfigured = true;
189 }
190 
192 {
193  AliEMCALTriggerBitConfig* triggerBitConfig = new AliEMCALTriggerBitConfigOld();
194  SetTriggerBitConfig(triggerBitConfig);
195 
196  // Initialize patch finder
197  if (fPatchFinder) delete fPatchFinder;
199 
200  SetL0TriggerAlgorithm(0, 63, 1<<fTriggerBitConfig->GetLevel0Bit(), 2, 1);
201  AddL1TriggerAlgorithm(0, 63, 1<<fTriggerBitConfig->GetGammaHighBit(), 2, 1);
202  AddL1TriggerAlgorithm(0, 63, 1<<fTriggerBitConfig->GetJetHighBit(), 16, 4);
203  fConfigured = true;
204 }
205 
207 {
208  AliEMCALTriggerBitConfig* triggerBitConfig = new AliEMCALTriggerBitConfigOld();
209  SetTriggerBitConfig(triggerBitConfig);
210 
211  // Initialize patch finder
212  if (fPatchFinder) delete fPatchFinder;
214 
215  SetL0TriggerAlgorithm(0, 63, 1<<fTriggerBitConfig->GetLevel0Bit(), 2, 1);
216  fConfigured = true;
217 }
218 
220 {
221  Short_t absId = 0;
222 
223  while (stream.good()) {
224  stream >> absId;
225  AddOfflineBadChannel(absId);
226  }
227 }
228 
230 {
231  std::ifstream file(fname);
233 }
234 
236 {
237  Short_t absId = -1;
238 
239  while (stream.good()) {
240  stream >> absId;
241  AddFastORBadChannel(absId);
242  }
243 }
244 
246 {
247  std::ifstream file(fname);
249 }
250 
252 {
253  if (absId < 0 || absId >= fFastORPedestal.GetSize()) {
254  AliWarning(Form("Abs. ID %d out of range (0,5000)", absId));
255  return;
256  }
257  fFastORPedestal[absId] = ped;
258 }
259 
261 {
262  Short_t absId = 0;
263  Float_t ped = 0;
264  while (stream.good()) {
265  stream >> ped;
266  SetFastORPedestal(absId, ped);
267  absId++;
268  }
269 }
270 
272 {
273  std::ifstream file(fname);
275 }
276 
278  fPatchAmplitudes->Reset();
279  fPatchADC->Reset();
280  fPatchADCSimple->Reset();
281  fLevel0TimeMap->Reset();
282  fTriggerBitMap->Reset();
283  memset(fL1ThresholdsOffline, 0, sizeof(ULong64_t) * 4);
284 }
285 
286 void AliEmcalTriggerMakerKernel::ReadTriggerData(AliVCaloTrigger *trigger){
287  trigger->Reset();
288  Int_t globCol=-1, globRow=-1;
289  Int_t adcAmp=-1, bitmap = 0;
290  while(trigger->Next()){
291  // get position in global 2x2 tower coordinates
292  // A0 left bottom (0,0)
293  trigger->GetPosition(globCol, globRow);
294  Int_t absId = -1;
295  fGeometry->GetAbsFastORIndexFromPositionInEMCAL(globCol, globRow, absId);
296 
297  // trigger bits can also occur on online masked fastors. Therefore trigger
298  // bits are handled before ADC values, and independently whether fastor is
299  // masked or not
300  trigger->GetTriggerBits(bitmap);
301  try {
302  (*fTriggerBitMap)(globCol, globRow) = bitmap;
303  }
305  std::string dirstring = e.GetDirection() == AliEMCALTriggerDataGrid<int>::OutOfBoundsException::kColDir ? "Col" : "Row";
306  AliErrorStream() << "Trigger maker task - filling trigger bit grid - index out-of-bounds in " << dirstring << ": " << e.GetIndex() << std::endl;
307  }
308 
309  // also Level0 times need to be handled without masking of the fastor ...
310  // @TODO cross check
311  Int_t nl0times(0);
312  trigger->GetNL0Times(nl0times);
313  if(nl0times){
314  TArrayI l0times(nl0times);
315  trigger->GetL0Times(l0times.GetArray());
316  for(int itime = 0; itime < nl0times; itime++){
317  try{
318  (*fLevel0TimeMap)(globCol,globRow) = static_cast<Char_t>(l0times[itime]);
319  break;
320  }
322  std::string dirstring = e.GetDirection() == AliEMCALTriggerDataGrid<char>::OutOfBoundsException::kColDir ? "Col" : "Row";
323  AliErrorStream() << "Trigger maker task - filling trigger bit grid - index out-of-bounds in " << dirstring << ": " << e.GetIndex() << std::endl;
324  }
325  }
326  }
327 
328  // exclude channel completely if it is masked as hot channel
329  if (fBadChannels.find(absId) != fBadChannels.end()){
330  AliDebugStream(1) << "Found ADC for masked fastor " << absId << ", rejecting" << std::endl;
331  continue;
332  }
333  // for some strange reason some ADC amps are initialized in reconstruction
334  // as -1, neglect those
335  trigger->GetL1TimeSum(adcAmp);
336  if (adcAmp < 0) adcAmp = 0;
337 
338  if (adcAmp >= fMinL1FastORAmp) {
339  try {
340  (*fPatchADC)(globCol,globRow) = adcAmp;
341  }
343  std::string dirstring = e.GetDirection() == AliEMCALTriggerDataGrid<double>::OutOfBoundsException::kColDir ? "Col" : "Row";
344  AliErrorStream() << "Trigger maker task - filling trigger bit grid - index out-of-bounds in " << dirstring << ": " << e.GetIndex() << std::endl;
345  }
346  }
347 
348  // Handling for L0 triggers
349  // For the ADC value we use fCaloTriggers->GetAmplitude()
350  // In data, all patches which have 4 TRUs with proper level0 times are
351  // valid trigger patches. Therefore we need to check all neighbors for
352  // the level0 times, not only the bottom left. In order to obtain this
353  // information, a lookup table with the L0 times for each TRU is created
354  Float_t amplitude(0);
355  trigger->GetAmplitude(amplitude);
356  amplitude *= 4; // values are shifted by 2 bits to fit in a 10 bit word (on the hardware side)
357  amplitude -= fFastORPedestal[absId];
358  if(amplitude < 0) amplitude = 0;
359  if (amplitude >= fMinL0FastORAmp) {
360  try{
361  (*fPatchAmplitudes)(globCol,globRow) = amplitude;
362  }
364  std::string dirstring = e.GetDirection() == AliEMCALTriggerDataGrid<int>::OutOfBoundsException::kColDir ? "Col" : "Row";
365  AliErrorStream() << "Trigger maker task - filling trigger bit grid - index out-of-bounds in " << dirstring << ": " << e.GetIndex() << std::endl;
366  }
367  }
368  }
369 }
370 
371 void AliEmcalTriggerMakerKernel::ReadCellData(AliVCaloCells *cells){
372  // fill the patch ADCs from cells
373  Int_t nCell = cells->GetNumberOfCells();
374  for(Int_t iCell = 0; iCell < nCell; ++iCell) {
375  // get the cell info, based in index in array
376  Short_t cellId = cells->GetCellNumber(iCell);
377 
378  // Check bad channel map
379  if (fOfflineBadChannels.find(cellId) != fOfflineBadChannels.end()) {
380  AliDebugStream(1) << "Cell " << cellId << " masked as bad channel, rejecting." << std::endl;
381  continue;
382  }
383 
384  Double_t amp = cells->GetAmplitude(iCell),
385  celltime = cells->GetTime(iCell);
386  if(TMath::Abs(celltime) > fMaxAbsCellTime) continue;
387  if(amp < fMinCellAmplitude) continue;
388  // get position
389  Int_t absId=-1;
390  fGeometry->GetFastORIndexFromCellIndex(cellId, absId);
392  // Exclude FEE amplitudes from cells which are within a TRU which is masked at
393  // online level. Using this the online acceptance can be applied to offline
394  // patches as well.
395  if(fBadChannels.find(absId) != fBadChannels.end()){
396  AliDebugStream(1) << "Cell " << cellId << " corresponding to masked fastor " << absId << ", rejecting." << std::endl;
397  continue;
398  }
399  }
400  Int_t globCol=-1, globRow=-1;
401  fGeometry->GetPositionInEMCALFromAbsFastORIndex(absId, globCol, globRow);
402  // add
403  amp /= fADCtoGeV;
404  try {
405  if (amp >= fMinCellAmp) (*fPatchADCSimple)(globCol,globRow) += amp;
406  }
408  }
409  }
410 }
411 
413  // get the V0 value and compute and set the offline thresholds
414  // get V0, compute thresholds and save them as global parameters
415  ULong64_t v0S = vzerodata->GetTriggerChargeA() + vzerodata->GetTriggerChargeC();
416  for (Int_t i = 0; i < 4; ++i) {
417  // A*V0^2/2^32+B*V0/2^16+C
418  fL1ThresholdsOffline[i]= ( ((ULong64_t)fThresholdConstants[i][0]) * v0S * v0S ) >> 32;
419  fL1ThresholdsOffline[i] += ( ((ULong64_t)fThresholdConstants[i][1]) * v0S ) >> 16;
420  fL1ThresholdsOffline[i] += ((ULong64_t)fThresholdConstants[i][2]);
421  }
422 }
423 
424 TObjArray *AliEmcalTriggerMakerKernel::CreateTriggerPatches(const AliVEvent *inputevent, Bool_t useL0amp){
425  //std::cout << "Finding trigger patches" << std::endl;
426  //AliEMCALTriggerPatchInfo *trigger, *triggerMainJet, *triggerMainGamma, *triggerMainLevel0;
427  //AliEMCALTriggerPatchInfo *triggerMainJetSimple, *triggerMainGammaSimple;
428 
429  if (useL0amp) {
431  }
432  else {
433  fADCtoGeV = EMCALTrigger::kEMCL1ADCtoGeV;
434  }
435 
436  Double_t vertexpos[3];
437  inputevent->GetPrimaryVertex()->GetXYZ(vertexpos);
438  TVector3 vertexvec(vertexpos);
439 
440  Int_t isMC = fIsMC ? 1 : 0;
441  Int_t offset = (1 - isMC) * fTriggerBitConfig->GetTriggerTypesEnd();
442 
443  // Create trigger bit masks. They are needed later to remove
444  // trigger bits from the trigger bit mask for non-matching patch types
445  Int_t jetPatchMask = 1 << fTriggerBitConfig->GetJetHighBit()
446  | 1 << fTriggerBitConfig->GetJetLowBit()
447  | 1 << (fTriggerBitConfig->GetJetHighBit() + fTriggerBitConfig->GetTriggerTypesEnd())
448  | 1 << (fTriggerBitConfig->GetJetLowBit() + fTriggerBitConfig->GetTriggerTypesEnd()),
449  gammaPatchMask = 1 << fTriggerBitConfig->GetGammaHighBit()
450  | 1 << fTriggerBitConfig->GetGammaLowBit()
451  | 1 << (fTriggerBitConfig->GetGammaHighBit() + fTriggerBitConfig->GetTriggerTypesEnd())
452  | 1 << (fTriggerBitConfig->GetGammaLowBit() + fTriggerBitConfig->GetTriggerTypesEnd()),
453  bkgPatchMask = 1 << fTriggerBitConfig->GetBkgBit();
454  //l0PatchMask = 1 << fTriggerBitConfig->GetLevel0Bit();
455 
456  std::vector<AliEMCALTriggerRawPatch> patches;
457  if (fPatchFinder) {
458  if (useL0amp) {
459  patches = fPatchFinder->FindPatches(*fPatchAmplitudes, *fPatchADCSimple);
460  }
461  else {
462  patches = fPatchFinder->FindPatches(*fPatchADC, *fPatchADCSimple);
463  }
464  }
465  TObjArray *result = new TObjArray(1000);
466  result->SetOwner(kTRUE);
467  for(std::vector<AliEMCALTriggerRawPatch>::iterator patchit = patches.begin(); patchit != patches.end(); ++patchit){
468  // Apply offline and recalc selection
469  // Remove unwanted bits from the online bits (gamma bits from jet patches and vice versa)
470  Int_t offlinebits = 0, onlinebits = (*fTriggerBitMap)(patchit->GetColStart(), patchit->GetRowStart());
471  if(HasPHOSOverlap(*patchit)) continue;
472  if(IsGammaPatch(*patchit)){
473  if(patchit->GetADC() > fL1ThresholdsOffline[1]) SETBIT(offlinebits, AliEMCALTriggerPatchInfo::kRecalcOffset + fTriggerBitConfig->GetGammaHighBit());
474  if(patchit->GetOfflineADC() > fL1ThresholdsOffline[1]) SETBIT(offlinebits, AliEMCALTriggerPatchInfo::kOfflineOffset + fTriggerBitConfig->GetGammaHighBit());
475  if(patchit->GetADC() > fL1ThresholdsOffline[3]) SETBIT(offlinebits, AliEMCALTriggerPatchInfo::kRecalcOffset + fTriggerBitConfig->GetGammaLowBit());
476  if(patchit->GetOfflineADC() > fL1ThresholdsOffline[3]) SETBIT(offlinebits, AliEMCALTriggerPatchInfo::kOfflineOffset + fTriggerBitConfig->GetGammaLowBit());
477  onlinebits &= gammaPatchMask;
478  }
479  if (IsJetPatch(*patchit)){
480  if(patchit->GetADC() > fL1ThresholdsOffline[0]) SETBIT(offlinebits, AliEMCALTriggerPatchInfo::kRecalcOffset + fTriggerBitConfig->GetJetHighBit());
481  if(patchit->GetOfflineADC() > fL1ThresholdsOffline[0]) SETBIT(offlinebits, AliEMCALTriggerPatchInfo::kOfflineOffset + fTriggerBitConfig->GetJetHighBit());
482  if(patchit->GetADC() > fL1ThresholdsOffline[2]) SETBIT(offlinebits, AliEMCALTriggerPatchInfo::kRecalcOffset + fTriggerBitConfig->GetJetLowBit());
483  if(patchit->GetOfflineADC() > fL1ThresholdsOffline[2]) SETBIT(offlinebits, AliEMCALTriggerPatchInfo::kOfflineOffset + fTriggerBitConfig->GetJetLowBit());
484  onlinebits &= jetPatchMask;
485  }
486  if (IsBkgPatch(*patchit)){
487  if(patchit->GetADC() > fBkgThreshold) SETBIT(offlinebits, AliEMCALTriggerPatchInfo::kRecalcOffset + fTriggerBitConfig->GetBkgBit());
488  if(patchit->GetOfflineADC() > fBkgThreshold) SETBIT(offlinebits, AliEMCALTriggerPatchInfo::kOfflineOffset + fTriggerBitConfig->GetBkgBit());
489  onlinebits &= bkgPatchMask;
490  }
491  // convert
492  AliEMCALTriggerPatchInfo *fullpatch = AliEMCALTriggerPatchInfo::CreateAndInitialize(patchit->GetColStart(), patchit->GetRowStart(),
493  patchit->GetPatchSize(), patchit->GetADC(), patchit->GetOfflineADC(), patchit->GetOfflineADC() * fADCtoGeV,
494  onlinebits | offlinebits, vertexvec, fGeometry);
495  fullpatch->SetTriggerBitConfig(fTriggerBitConfig);
496  fullpatch->SetOffSet(offset);
497  result->Add(fullpatch);
498  }
499 
500  // Find Level0 patches
501  std::vector<AliEMCALTriggerRawPatch> l0patches;
502  if (fLevel0PatchFinder) l0patches = fLevel0PatchFinder->FindPatches(*fPatchAmplitudes, *fPatchADCSimple);
503  for(std::vector<AliEMCALTriggerRawPatch>::iterator patchit = l0patches.begin(); patchit != l0patches.end(); ++patchit){
504  Int_t offlinebits = 0, onlinebits = 0;
505  if(HasPHOSOverlap(*patchit)) continue;
506  ELevel0TriggerStatus_t L0status = CheckForL0(patchit->GetColStart(), patchit->GetRowStart());
507  if (L0status == kNotLevel0) continue;
508  if (L0status == kLevel0Fired) SETBIT(onlinebits, fTriggerBitConfig->GetLevel0Bit());
509  if (patchit->GetADC() > fL0Threshold) SETBIT(offlinebits, AliEMCALTriggerPatchInfo::kRecalcOffset + fTriggerBitConfig->GetLevel0Bit());
510  if (patchit->GetOfflineADC() > fL0Threshold) SETBIT(offlinebits, AliEMCALTriggerPatchInfo::kOfflineOffset + fTriggerBitConfig->GetLevel0Bit());
511 
512  AliEMCALTriggerPatchInfo *fullpatch = AliEMCALTriggerPatchInfo::CreateAndInitialize(patchit->GetColStart(), patchit->GetRowStart(),
513  patchit->GetPatchSize(), patchit->GetADC(), patchit->GetOfflineADC(), patchit->GetOfflineADC() * fADCtoGeV,
514  onlinebits | offlinebits, vertexvec, fGeometry);
515  fullpatch->SetTriggerBitConfig(fTriggerBitConfig);
516  result->Add(fullpatch);
517  }
518  // std::cout << "Finished finding trigger patches" << std::endl;
519  return result;
520 }
521 
524 
525  if(col < 0 || row < 0){
526  AliError(Form("Patch outside range [col %d, row %d]", col, row));
527  return kNotLevel0;
528  }
529  Int_t truref(-1), trumod(-1), absFastor(-1), adc(-1);
530  fGeometry->GetAbsFastORIndexFromPositionInEMCAL(col, row, absFastor);
531  fGeometry->GetTRUFromAbsFastORIndex(absFastor, truref, adc);
532  int nvalid(0);
533  const int kNRowsPhi = fGeometry->GetNTotalTRU() * 2;
534  for(int ipos = 0; ipos < 2; ipos++){
535  if(row + ipos >= kNRowsPhi) continue; // boundary check
536  for(int jpos = 0; jpos < 2; jpos++){
537  if(col + jpos >= kColsEta) continue; // boundary check
538  // Check whether we are in the same TRU
539  trumod = -1;
540  fGeometry->GetAbsFastORIndexFromPositionInEMCAL(col+jpos, row+ipos, absFastor);
541  fGeometry->GetTRUFromAbsFastORIndex(absFastor, trumod, adc);
542  if(trumod != truref) {
543  result = kNotLevel0;
544  return result;
545  }
546  if(col + jpos >= kColsEta) AliError(Form("Boundary error in col [%d, %d + %d]", col + jpos, col, jpos));
547  if(row + ipos >= kNRowsPhi) AliError(Form("Boundary error in row [%d, %d + %d]", row + ipos, row, ipos));
548  Char_t l0times = (*fLevel0TimeMap)(col + jpos,row + ipos);
549  if(l0times > fL0MinTime && l0times < fL0MaxTime) nvalid++;
550  }
551  }
552  if (nvalid == 4) result = kLevel0Fired;
553  return result;
554 }
555 
557  fBadChannels.clear();
558 }
559 
561  fOfflineBadChannels.clear();
562 }
563 
564 Bool_t AliEmcalTriggerMakerKernel::IsGammaPatch(const AliEMCALTriggerRawPatch &patch) const {
565  ULong_t bitmask = patch.GetBitmask(), testmask = 1 << fTriggerBitConfig->GetGammaHighBit() | 1 << fTriggerBitConfig->GetGammaLowBit();
566  return bitmask & testmask;
567 }
568 
569 Bool_t AliEmcalTriggerMakerKernel::IsJetPatch(const AliEMCALTriggerRawPatch &patch) const {
570  ULong_t bitmask = patch.GetBitmask(), testmask = 1 << fTriggerBitConfig->GetJetHighBit() | 1 << fTriggerBitConfig->GetJetLowBit();
571  return bitmask & testmask;
572 }
573 
574 Bool_t AliEmcalTriggerMakerKernel::IsBkgPatch(const AliEMCALTriggerRawPatch &patch) const {
575  ULong_t bitmask = patch.GetBitmask(), testmask = 1 << fTriggerBitConfig->GetBkgBit();
576  return bitmask & testmask;
577 }
578 
579 void AliEmcalTriggerMakerKernel::SetTriggerBitConfig(const AliEMCALTriggerBitConfig *const config) {
580  if (config == fTriggerBitConfig) return;
582  fTriggerBitConfig = config;
583 }
584 
585 bool AliEmcalTriggerMakerKernel::HasPHOSOverlap(const AliEMCALTriggerRawPatch &patch) const {
586  const int kEtaMinPhos = 16, kEtaMaxPhos = 31, kPhiMinPhos = 64, kPhiMaxPhos = 99;
587  if(patch.GetRowStart() + patch.GetPatchSize() -1 < kPhiMinPhos) return false; // EMCAL Patch
588  if(patch.GetRowStart() > kPhiMaxPhos) return false; // DCAL 1/3 supermodule
589  if(patch.GetColStart() + patch.GetPatchSize() -1 < kEtaMinPhos) return false;
590  if(patch.GetColStart() > kEtaMaxPhos) return false;
591  return true;
592 }
Int_t fBkgThreshold
threshold for the background patches (8x8)
ELevel0TriggerStatus_t CheckForL0(Int_t col, Int_t row) const
double Double_t
Definition: External.C:58
Double_t fMinCellAmplitude
Minimum amplitude in cell required to be considered for filling the data grid.
Bool_t IsGammaPatch(const AliEMCALTriggerRawPatch &patch) const
Bool_t IsBkgPatch(const AliEMCALTriggerRawPatch &patch) const
char Char_t
Definition: External.C:18
TObjArray * CreateTriggerPatches(const AliVEvent *inputevent, Bool_t useL0amp=kFALSE)
bool HasPHOSOverlap(const AliEMCALTriggerRawPatch &patch) const
AliEMCALTriggerDataGrid< int > * fTriggerBitMap
! Map of trigger bits
void ReadFastORBadChannelFromStream(std::istream &stream)
TArrayF fFastORPedestal
FastOR pedestal.
void SetTriggerBitConfig(const AliEMCALTriggerBitConfig *const config)
Bool_t fConfigured
Switch specifying whether the trigger maker kernel has been configured for a given data set...
Int_t fMinCellAmp
Minimum offline amplitude of the cells used to generate the patches.
void ReadFastORBadChannelFromFile(const char *fname)
Bool_t fApplyOnlineBadChannelsToOffline
Apply online bad channels to offline ADC values.
void ReadTriggerData(AliVCaloTrigger *trigger)
Int_t fMinL1FastORAmp
Minimum L1 amplitude of the FastORs used to generate the patches.
const AliEMCALTriggerBitConfig * fTriggerBitConfig
Trigger bit configuration, aliroot-dependent.
const AliEMCALGeometry * fGeometry
! Underlying EMCAL geometry
ULong64_t fL1ThresholdsOffline[4]
container for V0-dependent offline thresholds
int Int_t
Definition: External.C:63
void ReadOfflineBadChannelFromFile(const char *fname)
unsigned int UInt_t
Definition: External.C:33
Int_t fThresholdConstants[4][3]
simple offline trigger thresholds constants
float Float_t
Definition: External.C:68
Double_t fADCtoGeV
! Conversion factor from ADC to GeV
void AddL1TriggerAlgorithm(Int_t rowmin, Int_t rowmax, UInt_t bitmask, Int_t patchSize, Int_t subregionSize)
void SetL0TriggerAlgorithm(Int_t rowmin, Int_t rowmax, UInt_t bitmask, Int_t patchSize, Int_t subregionSize)
void ReadOfflineBadChannelFromStream(std::istream &stream)
void SetFastORPedestal(Short_t absId, Float_t ped)
unsigned long ULong_t
Definition: External.C:38
std::set< Short_t > fBadChannels
Container of bad channels.
Int_t fDebugLevel
Int_t fL0Threshold
threshold for the L0 patches (2x2)
AliEMCALTriggerDataGrid< double > * fPatchAmplitudes
! TRU Amplitudes (for L0)
Manager for constants used in the trigger maker.
short Short_t
Definition: External.C:23
void BuildL1ThresholdsOffline(const AliVVZERO *vzdata)
AliEMCALTriggerDataGrid< double > * fPatchADC
! ADC values map
Bool_t isMC
Int_t fMinL0FastORAmp
Minimum L0 amplitude of the FastORs used to generate the patches.
ClassImp(AliAnalysisTaskCRC) AliAnalysisTaskCRC
std::set< Short_t > fOfflineBadChannels
Abd ID of offline bad channels.
AliEMCALTriggerPatchFinder< double > * fPatchFinder
The actual patch finder.
TFile * file
AliEMCALTriggerDataGrid< double > * fPatchADCSimple
! patch map for simple offline trigger
Kernel of the EMCAL trigger patch maker.
void ReadFastORPedestalFromFile(const char *fname)
AliEMCALTriggerDataGrid< char > * fLevel0TimeMap
! Map needed to store the level0 times
AliEMCALTriggerAlgorithm< double > * fLevel0PatchFinder
Patch finder for Level0 patches.
Bool_t IsJetPatch(const AliEMCALTriggerRawPatch &patch) const
bool Bool_t
Definition: External.C:53
Double_t fMaxAbsCellTime
Maximum allowed abs cell time (default - 1)
void ReadFastORPedestalFromStream(std::istream &stream)
void ReadCellData(AliVCaloCells *cells)
const Double_t kEMCL0ADCtoGeV_AP