AliPhysics  9fe175b (9fe175b)
 All Classes Namespaces Files Functions Variables Typedefs Enumerations Enumerator Friends Macros Groups Pages
AliEmcalTriggerMakerKernel.cxx
Go to the documentation of this file.
1 /**************************************************************************
2  * Copyright(c) 1998-2015, ALICE Experiment at CERN, All rights reserved. *
3  * *
4  * Author: The ALICE Off-line Project. *
5  * Contributors are mentioned in the code where appropriate. *
6  * *
7  * Permission to use, copy, modify and distribute this software and its *
8  * documentation strictly for non-commercial purposes is hereby granted *
9  * without fee, provided that the above copyright notice appears in all *
10  * copies and that both the copyright notice and this permission notice *
11  * appear in the supporting documentation. The authors make no claims *
12  * about the suitability of this software for any purpose. It is *
13  * provided "as is" without express or implied warranty. *
14  **************************************************************************/
15 #include <iostream>
16 #include <vector>
17 #include <cstring>
18 #include <fstream>
19 
20 #include <TArrayI.h>
21 #include <TObjArray.h>
22 
23 #include "AliAODCaloTrigger.h"
24 #include "AliEMCALGeometry.h"
25 #include "AliEMCALTriggerConstants.h"
26 #include "AliEMCALTriggerDataGrid.h"
27 #include "AliEMCALTriggerPatchInfo.h"
28 #include "AliEMCALTriggerPatchFinder.h"
29 #include "AliEMCALTriggerAlgorithm.h"
30 #include "AliEMCALTriggerRawPatch.h"
33 #include "AliLog.h"
34 #include "AliVCaloCells.h"
35 #include "AliVCaloTrigger.h"
36 #include "AliVEvent.h"
37 #include "AliVVZERO.h"
38 
42 
44  TObject(),
45  fBadChannels(),
46  fOfflineBadChannels(),
47  fFastORPedestal(5000),
48  fTriggerBitConfig(NULL),
49  fPatchFinder(NULL),
50  fLevel0PatchFinder(NULL),
51  fL0MinTime(7),
52  fL0MaxTime(10),
53  fMinCellAmp(0),
54  fMinL0FastORAmp(0),
55  fMinL1FastORAmp(0),
56  fBkgThreshold(-1),
57  fL0Threshold(0),
58  fIsMC(kFALSE),
59  fDebugLevel(0),
60  fMaxAbsCellTime(1.),
61  fMinCellAmplitude(0.),
62  fGeometry(NULL),
63  fPatchAmplitudes(NULL),
64  fPatchADCSimple(NULL),
65  fPatchADC(NULL),
66  fLevel0TimeMap(NULL),
67  fTriggerBitMap(NULL),
68  fADCtoGeV(1.)
69 {
70  memset(fThresholdConstants, 0, sizeof(Int_t) * 12);
71  memset(fL1ThresholdsOffline, 0, sizeof(ULong64_t) * 4);
72 }
73 
75  delete fPatchAmplitudes;
76  delete fPatchADCSimple;
77  delete fPatchADC;
78  delete fLevel0TimeMap;
79  delete fTriggerBitMap;
80  delete fPatchFinder;
81  delete fLevel0PatchFinder;
83 }
84 
86  if (!fTriggerBitConfig) {
87  AliWarning("Trigger bit configuration was not provided! Assuming new bit configuration (>= 2013).");
88  AliEMCALTriggerBitConfig* triggerBitConfig = new AliEMCALTriggerBitConfigNew();
89  SetTriggerBitConfig(triggerBitConfig);
90  }
91 
97 
98  // Allocate containers for the ADC values
99  int nrows = fGeometry->GetNTotalTRU() * 2;
100  std::cout << "Allocating channel grid with 48 columns in eta and " << nrows << " rows in phi" << std::endl;
101  fPatchAmplitudes->Allocate(48, nrows);
102  fPatchADC->Allocate(48, nrows);
103  fPatchADCSimple->Allocate(48, nrows);
104  fLevel0TimeMap->Allocate(48, nrows);
105  fTriggerBitMap->Allocate(48, nrows);
106 }
107 
108 void AliEmcalTriggerMakerKernel::AddL1TriggerAlgorithm(Int_t rowmin, Int_t rowmax, UInt_t bitmask, Int_t patchSize, Int_t subregionSize)
109 {
111  AliEMCALTriggerAlgorithm<double> *trigger = new AliEMCALTriggerAlgorithm<double>(rowmin, rowmax, bitmask);
112  trigger->SetPatchSize(patchSize);
113  trigger->SetSubregionSize(subregionSize);
114  fPatchFinder->AddTriggerAlgorithm(trigger);
115 }
116 
117 void AliEmcalTriggerMakerKernel::SetL0TriggerAlgorithm(Int_t rowmin, Int_t rowmax, UInt_t bitmask, Int_t patchSize, Int_t subregionSize)
118 {
120  fLevel0PatchFinder = new AliEMCALTriggerAlgorithm<double>(rowmin, rowmax, bitmask);
121  fLevel0PatchFinder->SetPatchSize(patchSize);
122  fLevel0PatchFinder->SetSubregionSize(subregionSize);
123 }
124 
126 {
127  AliEMCALTriggerBitConfig* triggerBitConfig = new AliEMCALTriggerBitConfigNew();
128  SetTriggerBitConfig(triggerBitConfig);
129 
130  // Initialize patch finder
131  if (fPatchFinder) delete fPatchFinder;
133 
134  SetL0TriggerAlgorithm(0, 103, 1<<fTriggerBitConfig->GetLevel0Bit(), 2, 1);
135  AddL1TriggerAlgorithm(0, 63, 1<<fTriggerBitConfig->GetGammaHighBit() | 1<<fTriggerBitConfig->GetGammaLowBit(), 2, 1);
136  AddL1TriggerAlgorithm(64, 103, 1<<fTriggerBitConfig->GetGammaHighBit() | 1<<fTriggerBitConfig->GetGammaLowBit(), 2, 1);
137  AddL1TriggerAlgorithm(0, 63, 1<<fTriggerBitConfig->GetJetHighBit() | 1<<fTriggerBitConfig->GetJetLowBit() | 1<<fTriggerBitConfig->GetBkgBit(), 8, 4);
138  AddL1TriggerAlgorithm(64, 103, 1<<fTriggerBitConfig->GetJetHighBit() | 1<<fTriggerBitConfig->GetJetLowBit() | 1<<fTriggerBitConfig->GetBkgBit(), 8, 4);
139 }
140 
142 {
143  AliEMCALTriggerBitConfig* triggerBitConfig = new AliEMCALTriggerBitConfigNew();
144  SetTriggerBitConfig(triggerBitConfig);
145 
146  // Initialize patch finder
147  if (fPatchFinder) delete fPatchFinder;
149 
150  SetL0TriggerAlgorithm(0, 103, 1<<fTriggerBitConfig->GetLevel0Bit(), 2, 1);
151  AddL1TriggerAlgorithm(0, 63, 1<<fTriggerBitConfig->GetGammaHighBit() | 1<<fTriggerBitConfig->GetGammaLowBit(), 2, 1);
152  AddL1TriggerAlgorithm(64, 103, 1<<fTriggerBitConfig->GetGammaHighBit() | 1<<fTriggerBitConfig->GetGammaLowBit(), 2, 1);
153  AddL1TriggerAlgorithm(0, 63, 1<<fTriggerBitConfig->GetJetHighBit() | 1<<fTriggerBitConfig->GetJetLowBit(), 16, 4);
154  AddL1TriggerAlgorithm(64, 103, 1<<fTriggerBitConfig->GetJetHighBit() | 1<<fTriggerBitConfig->GetJetLowBit(), 8, 4);
155 }
156 
158 {
159  AliEMCALTriggerBitConfig* triggerBitConfig = new AliEMCALTriggerBitConfigNew();
160  SetTriggerBitConfig(triggerBitConfig);
161 
162  // Initialize patch finder
163  if (fPatchFinder) delete fPatchFinder;
165 
166  SetL0TriggerAlgorithm(0, 63, 1<<fTriggerBitConfig->GetLevel0Bit(), 2, 1);
167  AddL1TriggerAlgorithm(0, 63, 1<<fTriggerBitConfig->GetGammaHighBit() | 1<<fTriggerBitConfig->GetGammaLowBit(), 2, 1);
168  AddL1TriggerAlgorithm(0, 63, 1<<fTriggerBitConfig->GetJetHighBit() | 1<<fTriggerBitConfig->GetJetLowBit(), 16, 4);
169 }
170 
172 {
173  AliEMCALTriggerBitConfig* triggerBitConfig = new AliEMCALTriggerBitConfigOld();
174  SetTriggerBitConfig(triggerBitConfig);
175 
176  // Initialize patch finder
177  if (fPatchFinder) delete fPatchFinder;
179 
180  SetL0TriggerAlgorithm(0, 63, 1<<fTriggerBitConfig->GetLevel0Bit(), 2, 1);
181  AddL1TriggerAlgorithm(0, 63, 1<<fTriggerBitConfig->GetGammaHighBit(), 2, 1);
182  AddL1TriggerAlgorithm(0, 63, 1<<fTriggerBitConfig->GetJetHighBit(), 16, 4);
183 }
184 
186 {
187  AliEMCALTriggerBitConfig* triggerBitConfig = new AliEMCALTriggerBitConfigOld();
188  SetTriggerBitConfig(triggerBitConfig);
189 
190  // Initialize patch finder
191  if (fPatchFinder) delete fPatchFinder;
193 
194  SetL0TriggerAlgorithm(0, 63, 1<<fTriggerBitConfig->GetLevel0Bit(), 2, 1);
195  AddL1TriggerAlgorithm(0, 63, 1<<fTriggerBitConfig->GetGammaHighBit(), 2, 1);
196  AddL1TriggerAlgorithm(0, 63, 1<<fTriggerBitConfig->GetJetHighBit(), 16, 4);
197 }
198 
200 {
201  AliEMCALTriggerBitConfig* triggerBitConfig = new AliEMCALTriggerBitConfigOld();
202  SetTriggerBitConfig(triggerBitConfig);
203 
204  // Initialize patch finder
205  if (fPatchFinder) delete fPatchFinder;
207 
208  SetL0TriggerAlgorithm(0, 63, 1<<fTriggerBitConfig->GetLevel0Bit(), 2, 1);
209 }
210 
212 {
213  Short_t absId = 0;
214 
215  while (stream.good()) {
216  stream >> absId;
217  AddOfflineBadChannel(absId);
218  }
219 }
220 
222 {
223  std::ifstream file(fname);
225 }
226 
228 {
229  Short_t absId = -1;
230 
231  while (stream.good()) {
232  stream >> absId;
233  AddFastORBadChannel(absId);
234  }
235 }
236 
238 {
239  std::ifstream file(fname);
241 }
242 
243 void AliEmcalTriggerMakerKernel::SetFastORPedestal(Short_t absId, Float_t ped)
244 {
245  if (absId < 0 || absId >= fFastORPedestal.GetSize()) {
246  AliWarning(Form("Abs. ID %d out of range (0,5000)", absId));
247  return;
248  }
249  fFastORPedestal[absId] = ped;
250 }
251 
253 {
254  Short_t absId = 0;
255  Float_t ped = 0;
256  while (stream.good()) {
257  stream >> ped;
258  SetFastORPedestal(absId, ped);
259  absId++;
260  }
261 }
262 
264 {
265  std::ifstream file(fname);
267 }
268 
270  fPatchAmplitudes->Reset();
271  fPatchADC->Reset();
272  fPatchADCSimple->Reset();
273  fLevel0TimeMap->Reset();
274  fTriggerBitMap->Reset();
275  memset(fL1ThresholdsOffline, 0, sizeof(ULong64_t) * 4);
276 }
277 
278 void AliEmcalTriggerMakerKernel::ReadTriggerData(AliVCaloTrigger *trigger){
279  trigger->Reset();
280  Int_t globCol=-1, globRow=-1;
281  Int_t adcAmp=-1, bitmap = 0;
282  while(trigger->Next()){
283  // get position in global 2x2 tower coordinates
284  // A0 left bottom (0,0)
285  trigger->GetPosition(globCol, globRow);
286  Int_t absId = -1;
287  fGeometry->GetAbsFastORIndexFromPositionInEMCAL(globCol, globRow, absId);
288  // exclude channel completely if it is masked as hot channel
289  if (fBadChannels.find(absId) != fBadChannels.end()) continue;
290  // for some strange reason some ADC amps are initialized in reconstruction
291  // as -1, neglect those
292  trigger->GetL1TimeSum(adcAmp);
293  if (adcAmp < 0) adcAmp = 0;
294  trigger->GetTriggerBits(bitmap);
295 
296  if (adcAmp >= fMinL1FastORAmp) {
297  try {
298  (*fPatchADC)(globCol,globRow) = adcAmp;
299  }
301  }
302  try {
303  (*fTriggerBitMap)(globCol, globRow) = bitmap;
304  }
306  }
307  }
308 
309  // Handling for L0 triggers
310  // For the ADC value we use fCaloTriggers->GetAmplitude()
311  // In data, all patches which have 4 TRUs with proper level0 times are
312  // valid trigger patches. Therefore we need to check all neighbors for
313  // the level0 times, not only the bottom left. In order to obtain this
314  // information, a lookup table with the L0 times for each TRU is created
315  Float_t amplitude(0);
316  trigger->GetAmplitude(amplitude);
317  amplitude *= 4; // values are shifted by 2 bits to fit in a 10 bit word (on the hardware side)
318  amplitude -= fFastORPedestal[absId];
319  if(amplitude < 0) amplitude = 0;
320  if (amplitude >= fMinL0FastORAmp) {
321  (*fPatchAmplitudes)(globCol,globRow) = amplitude;
322  Int_t nl0times(0);
323  trigger->GetNL0Times(nl0times);
324  if(nl0times){
325  TArrayI l0times(nl0times);
326  trigger->GetL0Times(l0times.GetArray());
327  for(int itime = 0; itime < nl0times; itime++){
328  (*fLevel0TimeMap)(globCol,globRow) = static_cast<Char_t>(l0times[itime]);
329  break;
330  }
331  }
332  }
333  }
334 }
335 
336 void AliEmcalTriggerMakerKernel::ReadCellData(AliVCaloCells *cells){
337  // fill the patch ADCs from cells
338  Int_t nCell = cells->GetNumberOfCells();
339  for(Int_t iCell = 0; iCell < nCell; ++iCell) {
340  // get the cell info, based in index in array
341  Short_t cellId = cells->GetCellNumber(iCell);
342 
343  // Check bad channel map
344  if (fOfflineBadChannels.find(cellId) != fOfflineBadChannels.end()) {
345  AliDebug(10, Form("%hd is a bad channel, skipped.", cellId));
346  continue;
347  }
348 
349  Double_t amp = cells->GetAmplitude(iCell),
350  celltime = cells->GetTime(iCell);
351  if(TMath::Abs(celltime) > fMaxAbsCellTime) continue;
352  if(amp < fMinCellAmplitude) continue;
353  // get position
354  Int_t absId=-1;
355  fGeometry->GetFastORIndexFromCellIndex(cellId, absId);
356  Int_t globCol=-1, globRow=-1;
357  fGeometry->GetPositionInEMCALFromAbsFastORIndex(absId, globCol, globRow);
358  // add
359  amp /= fADCtoGeV;
360  try {
361  if (amp >= fMinCellAmp) (*fPatchADCSimple)(globCol,globRow) += amp;
362  }
364  }
365  }
366 }
367 
369  // get the V0 value and compute and set the offline thresholds
370  // get V0, compute thresholds and save them as global parameters
371  ULong64_t v0S = vzerodata->GetTriggerChargeA() + vzerodata->GetTriggerChargeC();
372  for (Int_t i = 0; i < 4; ++i) {
373  // A*V0^2/2^32+B*V0/2^16+C
374  fL1ThresholdsOffline[i]= ( ((ULong64_t)fThresholdConstants[i][0]) * v0S * v0S ) >> 32;
375  fL1ThresholdsOffline[i] += ( ((ULong64_t)fThresholdConstants[i][1]) * v0S ) >> 16;
376  fL1ThresholdsOffline[i] += ((ULong64_t)fThresholdConstants[i][2]);
377  }
378 }
379 
380 TObjArray *AliEmcalTriggerMakerKernel::CreateTriggerPatches(const AliVEvent *inputevent, Bool_t useL0amp){
381  //std::cout << "Finding trigger patches" << std::endl;
382  //AliEMCALTriggerPatchInfo *trigger, *triggerMainJet, *triggerMainGamma, *triggerMainLevel0;
383  //AliEMCALTriggerPatchInfo *triggerMainJetSimple, *triggerMainGammaSimple;
384 
385  if (useL0amp) {
387  }
388  else {
389  fADCtoGeV = EMCALTrigger::kEMCL1ADCtoGeV;
390  }
391 
392  Double_t vertexpos[3];
393  inputevent->GetPrimaryVertex()->GetXYZ(vertexpos);
394  TVector3 vertexvec(vertexpos);
395 
396  Int_t isMC = fIsMC ? 1 : 0;
397  Int_t offset = (1 - isMC) * fTriggerBitConfig->GetTriggerTypesEnd();
398 
399  // Create trigger bit masks. They are needed later to remove
400  // trigger bits from the trigger bit mask for non-matching patch types
401  Int_t jetPatchMask = 1 << fTriggerBitConfig->GetJetHighBit()
402  | 1 << fTriggerBitConfig->GetJetLowBit()
403  | 1 << (fTriggerBitConfig->GetJetHighBit() + fTriggerBitConfig->GetTriggerTypesEnd())
404  | 1 << (fTriggerBitConfig->GetJetLowBit() + fTriggerBitConfig->GetTriggerTypesEnd()),
405  gammaPatchMask = 1 << fTriggerBitConfig->GetGammaHighBit()
406  | 1 << fTriggerBitConfig->GetGammaLowBit()
407  | 1 << (fTriggerBitConfig->GetGammaHighBit() + fTriggerBitConfig->GetTriggerTypesEnd())
408  | 1 << (fTriggerBitConfig->GetGammaLowBit() + fTriggerBitConfig->GetTriggerTypesEnd()),
409  bkgPatchMask = 1 << fTriggerBitConfig->GetBkgBit();
410  //l0PatchMask = 1 << fTriggerBitConfig->GetLevel0Bit();
411 
412  std::vector<AliEMCALTriggerRawPatch> patches;
413  if (fPatchFinder) {
414  if (useL0amp) {
415  patches = fPatchFinder->FindPatches(*fPatchAmplitudes, *fPatchADCSimple);
416  }
417  else {
418  patches = fPatchFinder->FindPatches(*fPatchADC, *fPatchADCSimple);
419  }
420  }
421  TObjArray *result = new TObjArray(1000);
422  result->SetOwner(kTRUE);
423  for(std::vector<AliEMCALTriggerRawPatch>::iterator patchit = patches.begin(); patchit != patches.end(); ++patchit){
424  // Apply offline and recalc selection
425  // Remove unwanted bits from the online bits (gamma bits from jet patches and vice versa)
426  Int_t offlinebits = 0, onlinebits = (*fTriggerBitMap)(patchit->GetColStart(), patchit->GetRowStart());
427  if(HasPHOSOverlap(*patchit)) continue;
428  if(IsGammaPatch(*patchit)){
429  if(patchit->GetADC() > fL1ThresholdsOffline[1]) SETBIT(offlinebits, AliEMCALTriggerPatchInfo::kRecalcOffset + fTriggerBitConfig->GetGammaHighBit());
430  if(patchit->GetOfflineADC() > fL1ThresholdsOffline[1]) SETBIT(offlinebits, AliEMCALTriggerPatchInfo::kOfflineOffset + fTriggerBitConfig->GetGammaHighBit());
431  if(patchit->GetADC() > fL1ThresholdsOffline[3]) SETBIT(offlinebits, AliEMCALTriggerPatchInfo::kRecalcOffset + fTriggerBitConfig->GetGammaLowBit());
432  if(patchit->GetOfflineADC() > fL1ThresholdsOffline[3]) SETBIT(offlinebits, AliEMCALTriggerPatchInfo::kOfflineOffset + fTriggerBitConfig->GetGammaLowBit());
433  onlinebits &= gammaPatchMask;
434  }
435  if (IsJetPatch(*patchit)){
436  if(patchit->GetADC() > fL1ThresholdsOffline[0]) SETBIT(offlinebits, AliEMCALTriggerPatchInfo::kRecalcOffset + fTriggerBitConfig->GetJetHighBit());
437  if(patchit->GetOfflineADC() > fL1ThresholdsOffline[0]) SETBIT(offlinebits, AliEMCALTriggerPatchInfo::kOfflineOffset + fTriggerBitConfig->GetJetHighBit());
438  if(patchit->GetADC() > fL1ThresholdsOffline[2]) SETBIT(offlinebits, AliEMCALTriggerPatchInfo::kRecalcOffset + fTriggerBitConfig->GetJetLowBit());
439  if(patchit->GetOfflineADC() > fL1ThresholdsOffline[2]) SETBIT(offlinebits, AliEMCALTriggerPatchInfo::kOfflineOffset + fTriggerBitConfig->GetJetLowBit());
440  onlinebits &= jetPatchMask;
441  }
442  if (IsBkgPatch(*patchit)){
443  if(patchit->GetADC() > fBkgThreshold) SETBIT(offlinebits, AliEMCALTriggerPatchInfo::kRecalcOffset + fTriggerBitConfig->GetBkgBit());
444  if(patchit->GetOfflineADC() > fBkgThreshold) SETBIT(offlinebits, AliEMCALTriggerPatchInfo::kOfflineOffset + fTriggerBitConfig->GetBkgBit());
445  onlinebits &= bkgPatchMask;
446  }
447  // convert
448  AliEMCALTriggerPatchInfo *fullpatch = AliEMCALTriggerPatchInfo::CreateAndInitialize(patchit->GetColStart(), patchit->GetRowStart(),
449  patchit->GetPatchSize(), patchit->GetADC(), patchit->GetOfflineADC(), patchit->GetOfflineADC() * fADCtoGeV,
450  onlinebits | offlinebits, vertexvec, fGeometry);
451  fullpatch->SetTriggerBitConfig(fTriggerBitConfig);
452  fullpatch->SetOffSet(offset);
453  result->Add(fullpatch);
454  }
455 
456  // Find Level0 patches
457  std::vector<AliEMCALTriggerRawPatch> l0patches;
458  if (fLevel0PatchFinder) l0patches = fLevel0PatchFinder->FindPatches(*fPatchAmplitudes, *fPatchADCSimple);
459  for(std::vector<AliEMCALTriggerRawPatch>::iterator patchit = l0patches.begin(); patchit != l0patches.end(); ++patchit){
460  Int_t offlinebits = 0, onlinebits = 0;
461  if(HasPHOSOverlap(*patchit)) continue;
462  ELevel0TriggerStatus_t L0status = CheckForL0(patchit->GetColStart(), patchit->GetRowStart());
463  if (L0status == kNotLevel0) continue;
464  if (L0status == kLevel0Fired) SETBIT(onlinebits, fTriggerBitConfig->GetLevel0Bit());
465  if (patchit->GetADC() > fL0Threshold) SETBIT(offlinebits, AliEMCALTriggerPatchInfo::kRecalcOffset + fTriggerBitConfig->GetLevel0Bit());
466  if (patchit->GetOfflineADC() > fL0Threshold) SETBIT(offlinebits, AliEMCALTriggerPatchInfo::kOfflineOffset + fTriggerBitConfig->GetLevel0Bit());
467 
468  AliEMCALTriggerPatchInfo *fullpatch = AliEMCALTriggerPatchInfo::CreateAndInitialize(patchit->GetColStart(), patchit->GetRowStart(),
469  patchit->GetPatchSize(), patchit->GetADC(), patchit->GetOfflineADC(), patchit->GetOfflineADC() * fADCtoGeV,
470  onlinebits | offlinebits, vertexvec, fGeometry);
471  fullpatch->SetTriggerBitConfig(fTriggerBitConfig);
472  result->Add(fullpatch);
473  }
474  // std::cout << "Finished finding trigger patches" << std::endl;
475  return result;
476 }
477 
480 
481  if(col < 0 || row < 0){
482  AliError(Form("Patch outside range [col %d, row %d]", col, row));
483  return kNotLevel0;
484  }
485  Int_t truref(-1), trumod(-1), absFastor(-1), adc(-1);
486  fGeometry->GetAbsFastORIndexFromPositionInEMCAL(col, row, absFastor);
487  fGeometry->GetTRUFromAbsFastORIndex(absFastor, truref, adc);
488  int nvalid(0);
489  const int kNRowsPhi = fGeometry->GetNTotalTRU() * 2;
490  for(int ipos = 0; ipos < 2; ipos++){
491  if(row + ipos >= kNRowsPhi) continue; // boundary check
492  for(int jpos = 0; jpos < 2; jpos++){
493  if(col + jpos >= kColsEta) continue; // boundary check
494  // Check whether we are in the same TRU
495  trumod = -1;
496  fGeometry->GetAbsFastORIndexFromPositionInEMCAL(col+jpos, row+ipos, absFastor);
497  fGeometry->GetTRUFromAbsFastORIndex(absFastor, trumod, adc);
498  if(trumod != truref) {
499  result = kNotLevel0;
500  return result;
501  }
502  if(col + jpos >= kColsEta) AliError(Form("Boundary error in col [%d, %d + %d]", col + jpos, col, jpos));
503  if(row + ipos >= kNRowsPhi) AliError(Form("Boundary error in row [%d, %d + %d]", row + ipos, row, ipos));
504  Char_t l0times = (*fLevel0TimeMap)(col + jpos,row + ipos);
505  if(l0times > fL0MinTime && l0times < fL0MaxTime) nvalid++;
506  }
507  }
508  if (nvalid == 4) result = kLevel0Fired;
509  return result;
510 }
511 
513  fBadChannels.clear();
514 }
515 
517  fOfflineBadChannels.clear();
518 }
519 
520 Bool_t AliEmcalTriggerMakerKernel::IsGammaPatch(const AliEMCALTriggerRawPatch &patch) const {
521  ULong_t bitmask = patch.GetBitmask(), testmask = 1 << fTriggerBitConfig->GetGammaHighBit() | 1 << fTriggerBitConfig->GetGammaLowBit();
522  return bitmask & testmask;
523 }
524 
525 Bool_t AliEmcalTriggerMakerKernel::IsJetPatch(const AliEMCALTriggerRawPatch &patch) const {
526  ULong_t bitmask = patch.GetBitmask(), testmask = 1 << fTriggerBitConfig->GetJetHighBit() | 1 << fTriggerBitConfig->GetJetLowBit();
527  return bitmask & testmask;
528 }
529 
530 Bool_t AliEmcalTriggerMakerKernel::IsBkgPatch(const AliEMCALTriggerRawPatch &patch) const {
531  ULong_t bitmask = patch.GetBitmask(), testmask = 1 << fTriggerBitConfig->GetBkgBit();
532  return bitmask & testmask;
533 }
534 
535 void AliEmcalTriggerMakerKernel::SetTriggerBitConfig(const AliEMCALTriggerBitConfig *const config) {
536  if (config == fTriggerBitConfig) return;
538  fTriggerBitConfig = config;
539 }
540 
541 bool AliEmcalTriggerMakerKernel::HasPHOSOverlap(const AliEMCALTriggerRawPatch &patch) const {
542  const int kEtaMinPhos = 16, kEtaMaxPhos = 31, kPhiMinPhos = 64, kPhiMaxPhos = 99;
543  if(patch.GetRowStart() + patch.GetPatchSize() -1 < kPhiMinPhos) return false; // EMCAL Patch
544  if(patch.GetRowStart() > kPhiMaxPhos) return false; // DCAL 1/3 supermodule
545  if(patch.GetColStart() + patch.GetPatchSize() -1 < kEtaMinPhos) return false;
546  if(patch.GetColStart() > kEtaMaxPhos) return false;
547  return true;
548 }
Int_t fBkgThreshold
threshold for the background patches (8x8)
ELevel0TriggerStatus_t CheckForL0(Int_t col, Int_t row) const
Double_t fMinCellAmplitude
Minimum amplitude in cell required to be considered for filling the data grid.
Bool_t IsGammaPatch(const AliEMCALTriggerRawPatch &patch) const
Bool_t IsBkgPatch(const AliEMCALTriggerRawPatch &patch) const
TObjArray * CreateTriggerPatches(const AliVEvent *inputevent, Bool_t useL0amp=kFALSE)
bool HasPHOSOverlap(const AliEMCALTriggerRawPatch &patch) const
AliEMCALTriggerDataGrid< int > * fTriggerBitMap
! Map of trigger bits
void ReadFastORBadChannelFromStream(std::istream &stream)
TArrayF fFastORPedestal
FastOR pedestal.
void SetTriggerBitConfig(const AliEMCALTriggerBitConfig *const config)
Int_t fMinCellAmp
Minimum offline amplitude of the cells used to generate the patches.
void ReadFastORBadChannelFromFile(const char *fname)
void ReadTriggerData(AliVCaloTrigger *trigger)
Int_t fMinL1FastORAmp
Minimum L1 amplitude of the FastORs used to generate the patches.
const AliEMCALTriggerBitConfig * fTriggerBitConfig
Trigger bit configuration, aliroot-dependent.
const AliEMCALGeometry * fGeometry
! Underlying EMCAL geometry
ULong64_t fL1ThresholdsOffline[4]
container for V0-dependent offline thresholds
void ReadOfflineBadChannelFromFile(const char *fname)
Int_t fThresholdConstants[4][3]
simple offline trigger thresholds constants
Double_t fADCtoGeV
! Conversion factor from ADC to GeV
void AddL1TriggerAlgorithm(Int_t rowmin, Int_t rowmax, UInt_t bitmask, Int_t patchSize, Int_t subregionSize)
void SetL0TriggerAlgorithm(Int_t rowmin, Int_t rowmax, UInt_t bitmask, Int_t patchSize, Int_t subregionSize)
void ReadOfflineBadChannelFromStream(std::istream &stream)
void SetFastORPedestal(Short_t absId, Float_t ped)
std::set< Short_t > fBadChannels
Container of bad channels.
Int_t fDebugLevel
Int_t fL0Threshold
threshold for the L0 patches (2x2)
AliEMCALTriggerDataGrid< double > * fPatchAmplitudes
! TRU Amplitudes (for L0)
Manager for constants used in the trigger maker.
void BuildL1ThresholdsOffline(const AliVVZERO *vzdata)
AliEMCALTriggerDataGrid< double > * fPatchADC
! ADC values map
Bool_t isMC
Int_t fMinL0FastORAmp
Minimum L0 amplitude of the FastORs used to generate the patches.
ClassImp(AliAnalysisTaskCRC) AliAnalysisTaskCRC
std::set< Short_t > fOfflineBadChannels
Abd ID of offline bad channels.
AliEMCALTriggerPatchFinder< double > * fPatchFinder
The actual patch finder.
TFile * file
AliEMCALTriggerDataGrid< double > * fPatchADCSimple
! patch map for simple offline trigger
Kernel of the EMCAL trigger patch makerThe trigger maker kernel contains the core functionality of th...
void ReadFastORPedestalFromFile(const char *fname)
AliEMCALTriggerDataGrid< char > * fLevel0TimeMap
! Map needed to store the level0 times
AliEMCALTriggerAlgorithm< double > * fLevel0PatchFinder
Patch finder for Level0 patches.
Bool_t IsJetPatch(const AliEMCALTriggerRawPatch &patch) const
Double_t fMaxAbsCellTime
Maximum allowed abs cell time (default - 1)
void ReadFastORPedestalFromStream(std::istream &stream)
void ReadCellData(AliVCaloCells *cells)
const Double_t kEMCL0ADCtoGeV_AP